公开(公告)号：US20170365534A1

公开(公告)日：2017-12-21

申请号：US15625464

申请日：2017-06-16

Applicant: J-DEVICES CORPORATION

Inventor： Hirokazu MACHIDA ,  Kazuhiko KITANO

IPC: H01L23/14 ,  H01L21/56 ,  H01L23/00 ,  H01L23/544 ,  H01L23/552 ,  H01L21/48 ,  H01L23/31

CPC classification number: H01L23/142 ,  H01L21/4803 ,  H01L21/4846 ,  H01L21/4871 ,  H01L21/561 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/5389 ,  H01L23/544 ,  H01L23/552 ,  H01L24/03 ,  H01L24/04 ,  H01L24/11 ,  H01L24/13 ,  H01L24/19 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L24/92 ,  H01L24/97 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/02311 ,  H01L2224/02379 ,  H01L2224/02381 ,  H01L2224/03914 ,  H01L2224/04105 ,  H01L2224/11013 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/12105 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2224/83132 ,  H01L2224/83192 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2224/83 ,  H01L2924/0665

Abstract: A manufacturing method of a semiconductor package includes etching a first surface and a side surface of a base substrate, the base substrate including the first, a second and the side surfaces positioned between the first and the second surfaces, the base substrate containing a metal, attaching a metal different from the metal contained in the base substrate to the first and the side surfaces, disposing a semiconductor device on the second surface, the semiconductor device having an external terminal, forming a resin insulating layer sealing the semiconductor device, forming a first conductive layer on the resin insulating layer, forming an opening, exposing the external terminal, in the first conductive layer and the resin insulating layer; and forming a metal layer on the first and the side surfaces, on the first conductive layer and in the opening.