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公开(公告)号:US20170365534A1
公开(公告)日:2017-12-21
申请号:US15625464
申请日:2017-06-16
Applicant: J-DEVICES CORPORATION
Inventor: Hirokazu MACHIDA , Kazuhiko KITANO
IPC: H01L23/14 , H01L21/56 , H01L23/00 , H01L23/544 , H01L23/552 , H01L21/48 , H01L23/31
CPC classification number: H01L23/142 , H01L21/4803 , H01L21/4846 , H01L21/4871 , H01L21/561 , H01L21/563 , H01L23/3128 , H01L23/49816 , H01L23/5389 , H01L23/544 , H01L23/552 , H01L24/03 , H01L24/04 , H01L24/11 , H01L24/13 , H01L24/19 , H01L24/32 , H01L24/73 , H01L24/83 , H01L24/92 , H01L24/97 , H01L2223/54426 , H01L2223/54486 , H01L2224/02311 , H01L2224/02379 , H01L2224/02381 , H01L2224/03914 , H01L2224/04105 , H01L2224/11013 , H01L2224/11334 , H01L2224/11849 , H01L2224/12105 , H01L2224/2919 , H01L2224/32245 , H01L2224/73267 , H01L2224/82039 , H01L2224/83132 , H01L2224/83192 , H01L2224/92244 , H01L2224/97 , H01L2224/83 , H01L2924/0665
Abstract: A manufacturing method of a semiconductor package includes etching a first surface and a side surface of a base substrate, the base substrate including the first, a second and the side surfaces positioned between the first and the second surfaces, the base substrate containing a metal, attaching a metal different from the metal contained in the base substrate to the first and the side surfaces, disposing a semiconductor device on the second surface, the semiconductor device having an external terminal, forming a resin insulating layer sealing the semiconductor device, forming a first conductive layer on the resin insulating layer, forming an opening, exposing the external terminal, in the first conductive layer and the resin insulating layer; and forming a metal layer on the first and the side surfaces, on the first conductive layer and in the opening.
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公开(公告)号:US20170316998A1
公开(公告)日:2017-11-02
申请号:US15493231
申请日:2017-04-21
Applicant: J-DEVICES CORPORATION
Inventor: Hisakazu MARUTANI , Minoru KAI , Kazuhiko KITANO
IPC: H01L23/31 , H01L21/82 , H01L21/56 , H01L23/544 , H01L23/00
Abstract: A manufacturing method of a semiconductor package includes locating a plurality of semiconductor packages on a substrate, forming a resin insulating layer covering the plurality of semiconductor devices, forming grooves, in the resin insulating layer, enclosing each of the plurality of semiconductor devices and reaching the substrate, and irradiating the substrate with laser light in positional correspondence with the grooves to separate the plurality of semiconductor devices from each other.
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公开(公告)号:US20170358462A1
公开(公告)日:2017-12-14
申请号:US15621493
申请日:2017-06-13
Applicant: J-DEVICES CORPORATION
Inventor: Seita ARAKI , Kazuhiko KITANO
CPC classification number: H01L21/561 , H01L21/56 , H01L21/78 , H01L23/3128 , H01L23/544 , H01L24/03 , H01L24/19 , H01L24/20 , H01L24/32 , H01L24/83 , H01L24/92 , H01L24/97 , H01L2223/54426 , H01L2224/04105 , H01L2224/12105 , H01L2224/18 , H01L2224/2919 , H01L2224/32225 , H01L2224/32245 , H01L2224/82039 , H01L2224/83132 , H01L2224/83138 , H01L2224/83192 , H01L2224/92244 , H01L2224/97 , H01L2924/1432 , H01L2924/1434 , H01L2924/1461 , H01L2924/3025 , H01L2924/351 , H01L2224/83
Abstract: A manufacturing method of a semiconductor package includes disposing one or more semiconductor devices on a base substrate, each of the one or more semiconductor devices having an external terminal; forming a frame on the base substrate, the frame surrounding the one or more semiconductor devices; and forming a resin insulating layer inside the frame, the resin insulating layer sealing the one or more semiconductor devices and the resin insulating layer including a resin insulating material; wherein a surface of each of the one or more semiconductor devices on which the external terminal is not provided faces the base substrate.
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公开(公告)号:US20170316996A1
公开(公告)日:2017-11-02
申请号:US15472387
申请日:2017-03-29
Applicant: J-DEVICES CORPORATION
Inventor: Yasuyuki TAKEHARA , Kazuhiko KITANO
IPC: H01L23/29 , H01L21/306 , H01L21/56 , H01L23/00
Abstract: A semiconductor package includes a substrate having at least one recessed portion, a semiconductor device located on a surface of the substrate, the surface having the at least one recessed portion, and a resin insulating layer covering the semiconductor device.
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