公开(公告)号：WO2021146284A8

公开(公告)日：2021-07-22

申请号：PCT/US2021/013238

申请日：2021-01-13

Applicant: KEMET ELECTRONICS CORPORATION

Inventor： BULTITUDE, John ,  BLAIS, Peter Alexandre ,  BURK, James A. ,  MILLER, Galen W. ,  HAYES, Hunter ,  TEMPLETON, Allen ,  JONES, Lonnie G. ,  LAPS, Mark, R.

IPC: H01G4/38 ,  H01L23/488 ,  H01L23/498 ,  H05K1/18 ,  H05K7/14 ,  H01G4/224 ,  H01G4/228 ,  H01G4/30 ,  H01L25/072 ,  H01L29/1608 ,  H01L29/2003 ,  H05K1/0204 ,  H05K1/0259 ,  H05K1/0272 ,  H05K1/145 ,  H05K1/181 ,  H05K2201/10015 ,  H05K2201/10166 ,  H05K2201/10545 ,  H05K3/328

Abstract: Provided is an improved electronic component package. The electronic component package comprises a multiplicity of electronic components wherein each electronic component comprises a first external termination and a second external termination. The electronic component package also includes a structural lead frame comprising multiple leads wherein each lead is mounted to at least one first external termination and the structural lead frame comprises at least one break away feature between adjacent leads.

公开(公告)号：WO2020172020A1

公开(公告)日：2020-08-27

申请号：PCT/US2020/017917

申请日：2020-02-12

Applicant: KEMET ELECTRONICS CORPORATION

Inventor： TEMPLETON, Allen ,  BULTITUDE, John ,  JONES, Lonnie, G. ,  LESSNER, Philip, M.

IPC: H01G4/008 ,  H01L23/00 ,  H01L23/495 ,  H05K7/00

Abstract: An improved electronic assembly is provided. The electronic assembly comprises a ceramic interposer comprising multiple layers. The active layers of the multiple layers form an embedded capacitor comprising parallel electrodes with a dielectric between adjacent electrodes wherein adjacent electrodes have opposite polarity. A wide band gap device is also on the multilayered ceramic interposer.

公开(公告)号：WO2021146284A1

公开(公告)日：2021-07-22

申请号：PCT/US2021/013238

申请日：2021-01-13

Applicant: KEMET ELECTRONICS CORPORATION

Inventor： BULTITUDE, John ,  BLAIS, Peter Alexandre ,  BURK, James A. ,  MILLER, Galen W. ,  HAYES, Hunter ,  TEMPLETON, Allen ,  JONES, Lonnie G. ,  LAPS, Mark, R.

IPC: H01G4/38 ,  H01L23/488 ,  H01L23/498 ,  H05K1/18 ,  H05K7/14 ,  H01G4/30 ,  H01L25/072 ,  H01L29/1608 ,  H01L29/2003 ,  H05K1/0272 ,  H05K1/145 ,  H05K1/181 ,  H05K2201/10015 ,  H05K2201/10166 ,  H05K2201/10545 ,  H05K3/328

Abstract: Provided is an improved electronic component package. The electronic component package comprises a multiplicity of electronic components wherein each electronic component comprises a first external termination and a second external termination. The electronic component package also includes a structural lead frame comprising multiple leads wherein each lead is mounted to at least one first external termination and the structural lead frame comprises at least one break away feature between adjacent leads.

公开(公告)号：WO2020171861A1

公开(公告)日：2020-08-27

申请号：PCT/US2019/060746

申请日：2019-11-11

Applicant: KEMET ELECTRONICS CORPORATION

Inventor： BULTITUDE, John ,  JONES, Lonnie, G. ,  TEMPLETON, Allen ,  LESSNER, Philip, M.

IPC: H01G4/20 ,  H01G4/30 ,  H01L23/485

Abstract: Provided herein is a module for packaging semiconductors comprising: at least one PDC comprising parallel internal electrodes of alternating polarity with a paraelectric dielectric between adjacent internal electrodes wherein the paraelectric dielectric has a permittivity above 10 to no more than 300; and wherein the PDC forms a capacitor couple with at least one semiconductor.

公开(公告)号：WO2022055841A1

公开(公告)日：2022-03-17

申请号：PCT/US2021/049221

申请日：2021-09-07

Applicant: KEMET ELECTRONICS CORPORATION

Inventor： BULTITUDE, John ,  REED, Nathan, A. ,  TEMPLETON, Allen ,  MAGEE, James, R. ,  DAVIS, James ,  GURAV, Abhijit ,  HAYES, Hunter ,  GUO, Hanzheng

IPC: H01G4/12 ,  H01G4/38 ,  H01G4/018 ,  H01G4/002

Abstract: Provided is an improved multilayered ceramic capacitor and an electronic device comprising the multilayered ceramic capacitor. The multilayer ceramic capacitor comprises first conductive plates electrically connected to first external terminations and second conductive plates electrically connected to second external terminations. The first conductive plates and second conductive plates form a capacitive couple. A ceramic portion is between the first conductive plates and said second conductive plates wherein the ceramic portion comprises paraelectric ceramic dielectric. The multilayer ceramic capacitor has a rated DC voltage and a rated AC VPP wherein the rated AC VPP is higher than the rated DC voltage.

公开(公告)号：WO2021216421A1

公开(公告)日：2021-10-28

申请号：PCT/US2021/027916

申请日：2021-04-19

Applicant: KEMET ELECTRONICS CORPORATION

Inventor： LAPS, Mark R. ,  BULTITUDE, John ,  LESSNER, Philip M. ,  JONES, Lonnie G. ,  TEMPLETON, Allen ,  REED, Nathan A.

IPC: H01G11/18 ,  H01G11/26 ,  H01G11/28 ,  H01G2/08 ,  H01G2/14

Abstract: Provided is a heat dissipating capacitor comprising internal electrodes of opposing polarity forming a capacitive couple between external terminations. A dielectric is between the internal electrodes. The heat dissipating capacitor comprises at least one thermal dissipation layer and at least one thermal conductive termination wherein the thermal dissipation layer is in thermally conductive contact with the thermal conductive termination.

公开(公告)号：WO2021146270A2

公开(公告)日：2021-07-22

申请号：PCT/US2021/013217

申请日：2021-01-13

Applicant: KEMET ELECTRONICS CORPORATION

Inventor： BULTITUDE, John ,  BLAIS, Peter, Alexandre ,  BURK, James, A. ,  MILLER, Galen, W. ,  HAYES, Hunter ,  TEMPLETON, Allen ,  JONES, Lonnie, G. ,  LAPS, Mark, R.

IPC: H01L23/495 ,  H05K1/11 ,  H05K3/46 ,  H01G4/30 ,  H01G4/224 ,  H01G4/228 ,  H01G4/38 ,  H01L25/072 ,  H01L29/1608 ,  H01L29/2003 ,  H05K1/0272 ,  H05K1/145 ,  H05K1/181 ,  H05K2201/10015 ,  H05K2201/10166 ,  H05K2201/10545 ,  H05K3/328

Abstract: Provided is a high-density multi-component package comprising a first module interconnect pad and a second module interconnect pad. At least two electronic components are mounted to and between the first module interconnect pad and the second module interconnect pad wherein a first electronic component is vertically oriented relative to the first module interconnect pad. A second electronic component is vertically oriented relative to the second module interconnect pad.

公开(公告)号：EP3928336A1

公开(公告)日：2021-12-29

申请号：EP19916198.5

申请日：2019-11-11

Applicant: Kemet Electronics Corporation

Inventor： BULTITUDE, John ,  JONES, Lonnie, G. ,  TEMPLETON, Allen ,  LESSNER, Philip, M.

IPC: H01G4/20 ,  H01G4/30 ,  H01L23/485

公开(公告)号：EP4100975A1

公开(公告)日：2022-12-14

申请号：EP21741869.8

申请日：2021-01-13

Applicant: Kemet Electronics Corporation

Inventor： BULTITUDE, John ,  BLAIS, Peter Alexandre ,  BURK, James A. ,  MILLER, Galen W. ,  HAYES, Hunter ,  TEMPLETON, Allen ,  JONES, Lonnie G. ,  LAPS, Mark, R.

IPC: H01G4/38 ,  H01L23/488 ,  H01L23/498 ,  H05K1/18 ,  H05K7/14

公开(公告)号：EP4211709A1

公开(公告)日：2023-07-19

申请号：EP21867418.2

申请日：2021-09-07

Applicant: Kemet Electronics Corporation

Inventor： BULTITUDE, John ,  REED, Nathan, A. ,  TEMPLETON, Allen ,  MAGEE, James, R. ,  DAVIS, James ,  GURAV, Abhijit ,  HAYES, Hunter ,  GUO, Hanzheng

IPC: H01G4/12 ,  H01G4/38 ,  H01G4/018 ,  H01G4/002