Abstract:
A method and apparatus for process control in the processing of a substrate is disclosed in the present invention. Embodiments of the present invention utilize a first analysis tool to determine changes in a substrate's geometry. The substrate geometry data is used to generate sampling plan that will be used to check areas of the substrate that are likely to have errors after processing. The sampling plan is fed forwards to a second analysis tool that samples the substrate after it has been processed.
Abstract:
Systems and methods for providing improved scanner corrections are disclosed. Scanner corrections provided in accordance with the present disclosure may be referred to as wafer geometry aware scanner corrections. More specifically, wafer geometry and/or wafer shape signature information are utilized to improve scanner corrections. By removing the wafer geometry as one of the error sources that may affect the overlay accuracy, better scanner corrections can be obtained because one less contributing factor needs to be modeled.