公开(公告)号：JPH05342871A

公开(公告)日：1993-12-24

申请号：JP34420092

申请日：1992-12-24

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： GO SHIYOUJIYUN ,  KEN SUIKI ,  SOU GENTETSU ,  KIN OUCHIYUU ,  KIN DAIYOU

IPC: G11C11/409 ,  G11C11/40

Abstract: PURPOSE: To reduce the delay time of a sensing operation by switch transistor for permitting assigning a load transistor pair of a sense amplifier group to each sense amplifier and providing a switch transistor which separates the output node of the amplifier and a main amplifier. CONSTITUTION: The output signal waveform of a column decoder 120 is delayed for a time required for permitting a signals of the output node pair 111 and 112 in a sense back-up circuit 100 to reach a prescribed reference level by a delay element 17 which is connected between an output node pairs 113 and 114 being different from plural sense amplifiers so as to be added to the gates of transistors Tr 15 and 16. Thus, Trs 15 and 16 are made to be in a conductive state, metallic line parasite capacitances 10 and 20 are connected to the nodes 111 and 112, the voltage of the node 111 is rapidly lowered and the voltage of the node 112 is lowered relatively gradually. Then, the main amplifier 30 is operated when control signals CNTL1 and CNTL2 are inputted and the voltages of the nodes 113 and 114 are instantaneously separated.