公开(公告)号：JPH0669219A

公开(公告)日：1994-03-11

申请号：JP13751493

申请日：1993-06-08

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： KIN KITOU ,  GU YOUSHIYO ,  KAN TAIGEN ,  GU CHINKON

IPC: H01L29/73 ,  H01L21/331 ,  H01L29/732

Abstract: PURPOSE: To improve the integration of a logic circuit by constituting a bipolar device as an upward-structure type, including an isolation oxide film, filled in a trench formed in a semiconductor substrate. CONSTITUTION: An n -embedded layer 2 is formed on a silicon substrate 1, on which layer an emitter is formed. A silicon layer 3 is formed on the n - embedded layer 2 which a low-temperature growing method, on which layer a substantial base is formed. After completion of the formation of a field oxide film 9, there are formed on the semiconductor substrate 1 the sequence, an N -polycrystalline silicon 10, a silicide 11, a low-temperature deposited oxide film 12, and a polycrystalline silicon layer 13. In succession, after an N - polycrystalline silicon electrode and a collector region are defined with a fine pattern formation method the layers 10 to 13 are selectively removed with a dry etching method. Operating voltage and a switching speed of an IIL circuit are improved by making equal the upward operating characteristic and downward operating characteristic of the bipolar device. Hereby, in the case of an ECL circuit, integration is enhanced sharply while keeping speed performance.