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公开(公告)号:JP2002124523A
公开(公告)日:2002-04-26
申请号:JP2001306688
申请日:2001-10-02
Applicant: KOREA ELECTRONICS TELECOMM
Inventor: LEE JONG-LAM , KIM HAE-CHEON , MUN JAE-KYOUNG , PARK HYUNG-MOO
IPC: H01L29/812 , H01L21/338 , H01L21/76 , H01L21/8252 , H01L29/10 , H01L29/45
Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device by which the influx of the parasitic carrier at the interface between a substrate and a buffer layer to a channel layer can be prevented, and to provide a method for manufacturing the semiconductor device. SOLUTION: A first GaAs buffer layer 10A which is not doped is formed on a semi-insulating GaAs substrate 70, and a superlattice layer 80 is formed on the first GaAs buffer layer 10A. A second GaAs buffer layer 10B which is of the identical material with the first GaAs buffer layer 10A and is not doped is formed on the superlattice layer 80. A channel layer 20 is formed on the second GaAs buffer layer 10B, and a surface protecting film 30 is formed on the channel layer 20.
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公开(公告)号:DE4424549A1
公开(公告)日:1995-01-19
申请号:DE4424549
申请日:1994-07-12
Applicant: KOREA ELECTRONICS TELECOMM
Inventor: KIM DONG-GOO , SONG MIN-KYU , PARK SEONG-SU , KANG SEUNG-GOO , YOON HYUNG-JIN , PARK HYUNG-MOO
IPC: H01L21/52 , H01L23/02 , H01L23/04 , H01L23/28 , H01L23/433 , H01L23/48 , H01L23/495 , H01L23/60 , H01L23/66 , H01L23/12 , H01L23/36 , H01L21/50
Abstract: A method of packaging a power semiconductor device is disclosed, comprising the steps of preparing a lead frame including a paddle for providing a semiconductor chip on a top surface thereof, tie bars for supporting said paddle, wherein said paddle being provided lower in horizontal surface than the leads; attaching a heat radiating plate on a bottom surface of the paddle by cladding; attaching a Kovar plate on the top surface of the paddle by soldering, said Kovar plate having similar heat expansion coefficient to that of the chip; providing the chip on the Kovar plate by soldering; wire-bonding terminals of said semiconductor chip to the corresponding leads of the lead frame, respectively; coating polyimide over the semiconductor chip by spin-coating; curing the polyimide coated thus; forming a metal cap above the said paddle by soldering, and injecting a molding material into a molder for enclosing the paddle and curing the molding material injected thus the method can be applied to produce a plastic package of a power semiconductor device at low cost. The metal cap is grounded through the tie bars as a source electrode to shield a noise.
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公开(公告)号:DE4424549C2
公开(公告)日:1996-10-17
申请号:DE4424549
申请日:1994-07-12
Applicant: KOREA ELECTRONICS TELECOMM
Inventor: KIM DONG-GOO , SONG MIN-KYU , PARK SEONG-SU , KANG SEUNG-GOO , YOON HYUNG-JIN , PARK HYUNG-MOO
IPC: H01L21/52 , H01L23/02 , H01L23/04 , H01L23/28 , H01L23/433 , H01L23/48 , H01L23/495 , H01L23/60 , H01L23/66 , H01L23/12 , H01L23/36 , H01L21/50
Abstract: A method of packaging a power semiconductor device is disclosed, comprising the steps of preparing a lead frame including a paddle for providing a semiconductor chip on a top surface thereof, tie bars for supporting said paddle, wherein said paddle being provided lower in horizontal surface than the leads; attaching a heat radiating plate on a bottom surface of the paddle by cladding; attaching a Kovar plate on the top surface of the paddle by soldering, said Kovar plate having similar heat expansion coefficient to that of the chip; providing the chip on the Kovar plate by soldering; wire-bonding terminals of said semiconductor chip to the corresponding leads of the lead frame, respectively; coating polyimide over the semiconductor chip by spin-coating; curing the polyimide coated thus; forming a metal cap above the said paddle by soldering, and injecting a molding material into a molder for enclosing the paddle and curing the molding material injected thus the method can be applied to produce a plastic package of a power semiconductor device at low cost. The metal cap is grounded through the tie bars as a source electrode to shield a noise.
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