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公开(公告)号：GB2321571A
公开(公告)日：1998-07-29
申请号：GB9723283
申请日：1997-11-05
Applicant: KOREA ELECTRONICS TELECOMM , KOREA TELECOMMUNICATION
Inventor： NAM HONG SOON , KWON YOOL , PARK HONG SHIK
Abstract: An STM-16 Network-Node Interface (NNI) is capable of checking whether a fault is generated on any station when the VC-4 AU received from a remotely located station has the fault, by checking the incoming data streams 17 and communication with the remote node using the still unused values of APS bytes. The interface comprises duplicate physical layer processing blocks 10 for processing a physical layer to provide a plurality of simplex ATM layers, an ATM layer controller 40 for controlling the processing condition of each of the ATM layers processed by the ATM layer processing means, a controlling microprocessor 15; and ATM layer processing block 20 for processing the ATM layers to a plurality of ATM cells.
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公开(公告)号：GB2321571B
公开(公告)日：2001-05-16
申请号：GB9723283
申请日：1997-11-05
Applicant: KOREA ELECTRONICS TELECOMM , KOREA TELECOMMUNICATION
Inventor： NAM HONG SOON , KWON YOOL , PARK HONG SHIK
Abstract: The invention is to provide an STM-16 Network-Node Interface(NNI) which is capable of exactly checking whether a fault is generated on any station when the VC-4 AU received from a remotely located station has the fault, by checking the incoming data streams and communication with the remote node using the still unused values of APS bytes, thereby further enhancing the reliability thereof, which comprising duplicate physical layer processing blocks for processing a physical layer to provide a plurality of simplex ATM layers, and an ATM layer controller for controlling the processing condition of each of the ATM layers processed by the ATM layer processing means, to thereby processed information to the microprocessor; and ATM layer processing block for processing the ATM layers to a plurality of ATM cells.
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公开(公告)号：FR2702907A1
公开(公告)日：1994-09-23
申请号：FR9403202
申请日：1994-03-18
Applicant: TELECOMMUNICATIONS ELECT , KOREA TELECOMMUNICATION
Inventor： KIM YOUNG SUP , CHOI SONG IN , PARK HONG SHIK
Abstract: The invention relates to a parallel, distributed, sample-decrypter for a cell-based ATM physical layer, including a PRBS generator (22) intended to generate an 8-bit random number in order to execute a generator polynomial given by x + X + 1, a decrypter (21) intended to add 8 reception data bits to the 8 bits of the random number and deliver the decrypted data bits, and a sample processor (23) intended to extract, as first and second samples, 2 bits of the 8-bit random number in response to external synchronous clock and sampling clock signals, to extract, as PRBS samples from a sender, first and second highest-order bits of a syndrome signal originating from a cell delineation part in response to the two clock signals, to compare the first and second samples and the first and second highest-order bits with each other, and to deliver first and second synchronous signals depending on the result of the comparison.
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