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公开(公告)号：GB2306716A
公开(公告)日：1997-05-07
申请号：GB9622841
申请日：1996-11-01
Applicant: KOREA TELECOMMUNICATION
Inventor： KIM KYEOUN SOO , JANG SOON HWA , KWON SOON HONG
Abstract: A circuit for performing a bit-serial matrix transposition operation comprises an input shift register module 11 for inputting matrix elements of length k bits. The input shift register module 11 outputs the data in units of k/N bits and applies the units to a bit-serial transposition module 12. An output multiplexer module 13 selects k/N-bit data units from the bit-serial transposition module 12 in response to a switching control signal. An output register module 14 receives the data output from the output multiplexer module 13 in the k/N bit units and outputs N data in units of k bits which make up the transposed matrix.
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Patent Agency Ranking
公开(公告)号：GB2306716B
公开(公告)日：2000-02-16
申请号：GB9622841
申请日：1996-11-01
Applicant: KOREA TELECOMMUNICATION
Inventor： KIM KYEOUN SOO , JANG SOON HWA , KWON SOON HONG
Abstract: A very large scale integrated circuit for performing a bit-serial matrix transposition operation, comprising an input shift register module for inputting N multiplied results of two NxN matrixes in the unit of k bits and outputting them in the unit of k/N bits in response to a load signal, a bit-serial transposition module for selecting k/N-bit data from the input shift register module in response to a switching control signal, an output multiplexer module for selecting k/N-bit data from the bit-serial transposition module in response to the switching control signal, and an output register module for inputting output data from the output multiplexer module in the unit of k/N bits and outputting N data in the unit of k bits. According to the present invention, when an NxN matrix transposition operation is performed, the operation occupancy of transposition cells becomes 100% after an N-input delay occurs. Also, the processing unit of data becomes smaller by using a bit-serial processing algorithm. Therefore, the high-speed operation can be performed. Further, the number of gates can be reduced in the integrated circuit. Moreover, because the integrated circuit has a pipelined structure, it is applicable to a multi-dimensional signal processing system requiring a high-speed processing operation.
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公开(公告)号：DE4422682A1
公开(公告)日：1995-01-05
申请号：DE4422682
申请日：1994-06-28
Applicant: KOREA TELECOMMUNICATION
Inventor： KWON SOON HONG , KIM EUN HO , JIN BYUNG WOOK
Abstract: Prepaid card, used in public telephones, with an integrated circuit which is capable of preventing increasing the usable amount of money and in the process of minimising the capacity of its memory. The prepaid card with an integrated circuit is controlled in that an input-output stage of the card is compelled to receive a new usable amount of money and an instruction to communicate from a public telephone, in that it is determined whether the instruction to communicate which is received from the input-output stage is a command to update the usable amount of money stored in a memory of the card, in that a comparator, with which the card is equipped, is compelled to compare the new usable amount of money with the usable amount of money which is stored in the memory, and in that an updating of the usable amount of money which is stored in the memory is controlled on the basis of the result of the comparison.
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公开(公告)号：DE69309649D1
公开(公告)日：1997-05-15
申请号：DE69309649
申请日：1993-06-18
Applicant: KOREA TELECOMMUNICATION
Inventor： KWON SOON HONG , KIM EUN HO , JIN BYUNG WOOK , JOO WOON YONG
Abstract: PCT No. PCT/KR93/00050 Sec. 371 Date Jun. 27, 1994 Sec. 102(e) Date Jun. 27, 1994 PCT Filed Jun. 18, 1993 PCT Pub. No. WO94/00828 PCT Pub. Date Jan. 6, 1994A coin treatment apparatus is disclosed that includes structure for selecting the inserted coins based upon their size, in accordance with their specific currency units, and transferring the coins to a receiving space. Once in the receiving space, coins of the correct currency unit are moved to their respective receiving containers within a receiving box. Coins that are not of the correct currency unit are transferred to a separate receiving space and discharged from the apparatus.
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公开(公告)号：DE69320934D1
公开(公告)日：1998-10-15
申请号：DE69320934
申请日：1993-07-02
Applicant: KOREA TELECOMMUNICATION
Inventor： KWON SOON HONG , OH YOON SEOK , LEE HEO YOUNG , YOON JEONG NAM
Abstract: PCT No. PCT/KR93/00055 Sec. 371 Date Aug. 25, 1994 Sec. 102(e) Date Aug. 25, 1994 PCT Filed Jul. 2, 1993 PCT Pub. No. WO94/01962 PCT Pub. Date Jan. 20, 1994The Centralized Management System utilizing a Bus Interface Unit comprises a Computer (4z) installing an address Bus (4a), data Bus (4b), and control Bus (4c), a First-Level Station (4Q 1) communicating with the Computer (4z) as the First-Level Station (4Q 1) is connected to the buses (4a, 4b, 4c) of the Computer (4z), a plurality of second-level stations (4Q2, 4Q3, . . . , 4QM) communicating with the First-Level Station (4QI) as the second-level stations (4Q2, 4Q3, . . . , 4QM) are connected to the First-Level Station through a Multipoint Bus (4r). Therefore, the Centralized Management System is capable of communicating the Computer with the First-Level Station through a Dual Port RAM (Random Access Memory), intercommunicating a plurality of Second-Level Stations through a Multipoint Interface and Multipoint Bus, and controlling and managing several thousands of Terminals (for example, Public Telephones).
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公开(公告)号：FR2708363B1
公开(公告)日：1998-05-15
申请号：FR9407883
申请日：1994-06-27
Applicant: KOREA TELECOMMUNICATION
Inventor： KWON SOON HONG , KIM EUN HO , JIM BYUNG WOOK
Abstract: PURPOSE: To prevent the increase of the usable amount of the user of a prepaid card used for card type public telephone sets and, at the same time, to minimize the capacity of a memory which stores the usable amount. CONSTITUTION: A prepaid integrated circuit card is provided with a control section 20 which makes an input-output section 10 receive a new usable amount and instruction words for communication from a public telephone set 50 and discriminates whether or not an instruction word for communication received by means of the section 10 is the updating instruction of the usable amount stored in a memory 40. The control section 20 makes a comparator 30 compare the usable amount stored in the memory 40 with the new usable amount and controls the updating of the usable amount stored in the memory 40 based on the compared results.
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