公开(公告)号：WO2011126621A3

公开(公告)日：2012-01-05

申请号：PCT/US2011026509

申请日：2011-02-28

Applicant: LAM RES CORP ,  ASO TSUYOSHI ,  RUSU CAMELIA

Inventor： ASO TSUYOSHI ,  RUSU CAMELIA

IPC: H01L21/3065

CPC classification number: H01L21/76898 ,  H01L21/30655

Abstract: A method for etching features into a silicon substrate disposed below a mask in a plasma processing chamber is provided. The silicon substrate is etched through the mask comprising a plurality of cycles, wherein each cycle comprises a sidewall deposition phase and an etch phase. The sidewall deposition phase comprises providing a flow of sidewall inorganic deposition phase gas comprising a silicon containing compound gas and at least one of oxygen, nitrogen or NOx, into the plasma processing chamber, forming a plasma from the sidewall deposition phase gas in the plasma processing chamber, and stopping the flow of the sidewall deposition gas into the plasma processing chamber. The etch phase comprises, providing a flow of an etching gas comprising a halogen component, forming a plasma from the etching gas in the plasma processing chamber, and stopping the flow of the etching gas.

Abstract translation: 提供了一种在等离子体处理室中将特征蚀刻到设置在掩模下方的硅衬底中的方法。 通过包括多个周期的掩模蚀刻硅衬底，其中每个循环包括侧壁沉积阶段和蚀刻阶段。 侧壁沉积阶段包括提供包含含硅化合物气体和氧，氮或NOx中的至少一种的侧壁无机沉积相气体流到等离子体处理室中，在等离子体处理中从侧壁沉积相气体形成等离子体 并且阻止侧壁沉积气体流入等离子体处理室中。 蚀刻阶段包括提供包括卤素组分的蚀刻气体流，从等离子体处理室中的蚀刻气体形成等离子体，并停止蚀刻气体的流动。

公开(公告)号：WO2006049954A2

公开(公告)日：2006-05-11

申请号：PCT/US2005038373

申请日：2005-10-26

Applicant: LAM RES CORP ,  CHEN WAN-LIN ,  TAKESHITA KENJI ,  ASO TSUYOSHI ,  KAWAGUCHI SEIJI ,  MCCLARD THOMAS ,  MAGNI ENRICO ,  KELLY MICHAEL ,  LUPAN MICHELLE ,  HEFTY ROBERT

Inventor： CHEN WAN-LIN ,  TAKESHITA KENJI ,  ASO TSUYOSHI ,  KAWAGUCHI SEIJI ,  MCCLARD THOMAS ,  MAGNI ENRICO ,  KELLY MICHAEL ,  LUPAN MICHELLE ,  HEFTY ROBERT

IPC: B44C1/22 ,  B08B6/00 ,  H01L21/311

CPC classification number: B08B7/0035 ,  B05D1/62 ,  H01J37/32559 ,  H01L21/31116

Abstract: Methods for forming a protective polymeric coating on a silicon or silicon-carbide electrode of a plasma processing chamber are provided. The polymeric coating provides protection to the underlying surface of the electrode with respect to exposure to constituents of plasma and gaseous reactants. The methods can be performed during a process of cleaning the chamber, or during a process for etching a semiconductor substrate in the chamber.

Abstract translation: 提供了在等离子体处理室的硅或碳化硅电极上形成保护性聚合物涂层的方法。 相对于暴露于等离子体和气态反应物的组分，聚合物涂层为电极的下表面提供保护。 可以在清洁室的过程中或在用于蚀刻室中的半导体衬底的工艺期间执行这些方法。

公开(公告)号：SG183839A1

公开(公告)日：2012-10-30

申请号：SG2012064481

申请日：2011-02-28

Applicant: LAM RES CORP

Inventor： ASO TSUYOSHI ,  RUSU CAMELIA

Abstract: A method for etching features into a silicon substrate disposed below a mask in a plasma processing chamber is provided. The silicon substrate is etched through the mask comprising a plurality of cycles, wherein each cycle comprises a sidewall deposition phase and an etch phase. The sidewall deposition phase comprises providing a flow of sidewall inorganic deposition phase gas comprising a silicon containing compound gas and at least one of oxygen, nitrogen or NOx, into the plasma processing chamber, forming a plasma from the sidewall deposition phase gas in the plasma processing chamber, and stopping the flow of the sidewall deposition gas into the plasma processing chamber. The etch phase comprises, providing a flow of an etching gas comprising a halogen component, forming a plasma from the etching gas in the plasma processing chamber, and stopping the flow of the etching gas.