THIN FILM TRANSISTOR ARRAY SBUSTRATE AND FABRICATING METHOD THEREOF
    1.
    发明公开
    THIN FILM TRANSISTOR ARRAY SBUSTRATE AND FABRICATING METHOD THEREOF 审中-公开
    薄膜晶体管阵列及其制作方法

    公开(公告)号:KR20070078472A

    公开(公告)日:2007-08-01

    申请号:KR20060008708

    申请日:2006-01-27

    CPC classification number: G02F1/13458 G02F1/136227 G02F1/136286

    Abstract: A TFT(Thin Film Transistor) array substrate and its manufacturing method are provided to improve the stability of a substrate manufacturing process and to prevent the failure of contact between upper and lower electrodes due to undercut by preventing the generation of the undercut at a predetermined portion between a gate insulating layer and an inorganic protection layer using an improved contact hole structure composed of a contact hole lower portion and a contact hole upper portion with a large width compared to that of the contact hole lower portion. A gate line is formed on a lower substrate. An organic gate insulating layer(146) is formed on the resultant structure to cover the gate line. An inorganic protection layer(152) is formed on the organic gate insulating layer. A gate pad lower electrode(126) is formed on the resultant structure to be connected with the gate line. A first contact hole for exposing the gate pad lower electrode is formed through the inorganic protection layer and the organic gate insulating layer. A gate pad upper electrode(128) is connected to the gate pad lower electrode through the first contact hole. The first contact hole is composed of a lower portion and an upper portion. The width of the upper portion is larger than that of the lower portion in the first contact hole.

    Abstract translation: 提供TFT(薄膜晶体管)阵列基板及其制造方法以提高基板制造工艺的稳定性,并且通过防止在预定部分产生底切来防止由于底切而引起的上下电极之间的接触故障 使用与接触孔下部相比具有大的宽度的接触孔下部和接触孔上部构成的改进的接触孔结构,在栅极绝缘层和无机保护层之间。 栅极线形成在下基板上。 在所得结构上形成有机栅极绝缘层(146)以覆盖栅极线。 在有机栅极绝缘层上形成无机保护层(152)。 在所得结构上形成栅极焊盘下电极(126)以与栅极线连接。 通过无机保护层和有机栅极绝缘层形成用于暴露栅极焊盘下部电极的第一接触孔。 栅极焊盘上部电极(128)通过第一接触孔与栅极焊盘下部电极连接。 第一接触孔由下部和上部构成。 上部的宽度大于第一接触孔中的下部的宽度。

    LIQUID CRYSTAL DISPLAY DEVICE AND METHOD FOR FABRICATING THE SAME
    2.
    发明公开
    LIQUID CRYSTAL DISPLAY DEVICE AND METHOD FOR FABRICATING THE SAME 审中-公开
    液晶显示装置及其制造方法

    公开(公告)号:KR20070112989A

    公开(公告)日:2007-11-28

    申请号:KR20060046634

    申请日:2006-05-24

    Abstract: An LCD and a manufacturing method thereof are provided to form PR patterns with different heights by using an exposure device including a DMD(Digital Micro mirror Device) chip, thereby reducing the number of masks by not using a diffraction photo mask or a semitransparent mask and accordingly, manufacturing a TFT(Thin Film Transistor) substrate without using the exposure device with the DMD in all manufacturing processes. A method for manufacturing an LCD(Liquid Crystal Display) comprises the following steps of: providing an exposure device(100) where a light source and plural minute mirrors are arranged, wherein the plural minute mirrors are separately and electrically controlled to reflect light from the light source toward a position of a target selectively; forming at least one thin film(221,223) on a substrate(201) for the LCD; forming PR(PhotoResist) on the thin film; arranging the substrate on the position of the target; and driving the light source, controlling each of the minute mirrors of the exposure device, radiating light to the first position of the PR with first light intensity, and radiating light to the second position of the PR with second light intensity; developing the PR and remaining PR patterns(225a,225b) with different heights on the thin film; and patterning the thin film by using the PR patterns as a mask.

    Abstract translation: 提供LCD及其制造方法,通过使用包括DMD(数字微镜装置)芯片的曝光装置形成具有不同高度的PR图案,从而通过不使用衍射光掩模或半透明掩模来减少掩模的数量, 因此,在所有制造工艺中不使用具有DMD的曝光装置制造TFT(薄膜晶体管)基板。 一种用于制造LCD(液晶显示器)的方法包括以下步骤:提供设置有光源和多个分钟镜的曝光装置(100),其中多个分钟反射镜被分开并电控制以反射来自 选择性地朝向目标位置的光源; 在用于所述LCD的基板(201)上形成至少一个薄膜(221,223); 在薄膜上形成PR(PhotoResist); 将基板布置在目标的位置上; 并驱动光源,控制曝光装置的每个微反射镜,以第一光强度将光照射到PR的第一位置,并以第二光强度将光照射到PR的第二位置; 在薄膜上开发不同高度的PR和剩余PR图案(225a,225b); 并通过使用PR图案作为掩模对薄膜进行图案化。

    Array substrate for liquid crystal display device and fabrication method thereof
    3.
    发明专利
    Array substrate for liquid crystal display device and fabrication method thereof 有权
    用于液晶显示装置的阵列基板及其制造方法

    公开(公告)号:JP2007219493A

    公开(公告)日:2007-08-30

    申请号:JP2006328649

    申请日:2006-12-05

    CPC classification number: H01L27/124 H01L27/1288

    Abstract: PROBLEM TO BE SOLVED: To provide an array substrate for a liquid crystal display device with improved productivity by reducing the number of mask processes. SOLUTION: The array substrate includes: a gate line 221 and a gate electrode 222 extending from the gate line 221 formed on a substrate; a data line 261 intersected with the gate line 221 and configured with a gate insulating layer 230, a semiconductor layer 240 and a data metal layer 260; a pixel electrode 281 formed of a first transparent metal layer 281a at a pixel which is defined by the gate line 221 and data line 261; a source electrode 262 extending from the data line 261, and a drain electrode 263 spaced apart from the source electrode 262 to expose a channel; a pattern of a second transparent metal layer 291 formed on the data line 261, the source electrode 262 and the drain electrode 263, and the gate line 221, connecting the drain electrode 263 to the pixel electrode 281m, and having a cut portion over the gate line 221; and a partition wall 293 formed near the second transparent metal layer 291 on the pixel electrode 281. COPYRIGHT: (C)2007,JPO&INPIT

    Abstract translation: 要解决的问题:通过减少掩模过程的数量来提供一种通过降低生产率的液晶显示装置的阵列基板。 解决方案:阵列基板包括:栅极线221和从形成在基板上的栅极线221延伸的栅电极222; 与栅极线221相交并配置有栅极绝缘层230,半导体层240和数据金属层260的数据线261; 在由栅极线221和数据线261限定的像素处由第一透明金属层281a形成的像素电极281; 从数据线261延伸的源电极262以及与源电极262间隔开以露出沟道的漏电极263; 形成在数据线261上的第二透明金属层291,源电极262和漏电极263以及连接漏电极263与像素电极281m的栅极线221的图案,并且在第 栅极线221; 以及形成在像素电极281上的第二透明金属层291附近的分隔壁293。版权所有(C)2007,JPO&INPIT

    Etching tape and method of manufacturing array substrate for liquid crystal display device using same
    4.
    发明专利
    Etching tape and method of manufacturing array substrate for liquid crystal display device using same 有权
    蚀刻带和使用其制造液晶显示装置的阵列基板的方法

    公开(公告)号:JP2007059876A

    公开(公告)日:2007-03-08

    申请号:JP2006164456

    申请日:2006-06-14

    Abstract: PROBLEM TO BE SOLVED: To provide an etching tape and a method of manufacturing an array substrate for a liquid crystal display device using the same. SOLUTION: The etching tape includes a base sheet, and an etching material layer which a gel type etching material is applied and formed on the base sheet. The method of manufacturing the array substrate for the liquid crystal display device includes: a step of forming a gate electrode, a first electrode of storage capacitor and a gate interconnect line on a transparent insulating substrate; a step of forming a gate insulating film, an active layer, an ohmic wetting layer, a source electrode and a drain electrode, forming a dielectric layer and a second electrode of a storage capacitor, and forming data interconnect line; a step of forming a pixel electrode, forming a gate pad electrode and forming a data pad electrode; a step of forming a protective layer; and a step of forming a contact hole by etching a protective layer formed on the gate pad electrode and a protective layer formed on the data pad electrode by using the etching tape. COPYRIGHT: (C)2007,JPO&INPIT

    Abstract translation: 要解决的问题:提供一种蚀刻带和一种制造使用其的液晶显示装置的阵列基板的方法。 解决方案:蚀刻带包括基片和在基片上施加并形成凝胶型蚀刻材料的蚀刻材料层。 制造液晶显示装置用阵列基板的方法包括:在透明绝缘基板上形成栅电极,存储电容器的第一电极和栅极互连线的工序; 形成栅极绝缘膜,有源层,欧姆润湿层,源极和漏电极的步骤,形成存储电容器的电介质层和第二电极,形成数据互连线; 形成像素电极的步骤,形成栅极焊盘电极并形成数据焊盘电极; 形成保护层的步骤; 以及通过使用蚀刻带蚀刻形成在栅极焊盘电极上的保护层和形成在数据焊盘电极上的保护层来形成接触孔的步骤。 版权所有(C)2007,JPO&INPIT

    5.
    发明专利
    未知

    公开(公告)号:DE102006028999A1

    公开(公告)日:2007-01-18

    申请号:DE102006028999

    申请日:2006-06-23

    Abstract: A flat panel display includes a substrate, an array on the substrate, and a glass film formed by depositing glass powder over the substrate, including the array, melting the deposited glass powder over the array and hardening the deposited glass powder over the array.

    SUBSTRAT DE RESEAU DE TRANSISTORS EN COUCHES MINCES POUR UN AFFICHEUR A CRISTAUX LIQUIDES ET SON PROCEDE DE FABRICATION

    公开(公告)号:FR2895805A1

    公开(公告)日:2007-07-06

    申请号:FR0611255

    申请日:2006-12-22

    Abstract: Un substrat de réseau de transistors en couches minces et un procédé de fabrication du substrat de réseau de transistors en couches minces sont décrits.Le substrat de réseau de transistors en couches minces comprend des lignes de grille (101) et des lignes de données (102) se croisant pour définir des régions de pixel : une pluralité de transistors en couches minces chaque transistor en couches minces comportant une électrode de grille (101a), une électrode source (102a), et une électrode drain (102b) située adjacente à l'électrode source (102a) ; une pluralité d'électrodes de pixel (103) sur les régions de pixel, et une pluralité de motifs d'électrodes transparentes (103b) situés adjacents à une des lignes de données (102), dans lequel les électrodes source (102a) font saillie à partir de la ligne de données (102).Le réseau de transistors en couches minces peut être formé en utilisant un nombre de masques réduit.

    Flat panel display with glass film

    公开(公告)号:GB2427745A

    公开(公告)日:2007-01-03

    申请号:GB0612647

    申请日:2006-06-26

    Abstract: A flat panel display includes a substrate (100), an array (150) on the substrate (100), and a glass film (200) formed by depositing glass powder over the substrate (100), including the array (150), melting the deposited glass powder over the array and hardening the deposited glass powder over the array. The glass film may also be form by coating glass paste over the substrate and array. The glass powder may consist of ZnO, SiO2, and BaO particles and a binder.

    Thin film transistor array substrate system and method for manufacturing

    公开(公告)号:GB2434687B

    公开(公告)日:2008-03-05

    申请号:GB0625091

    申请日:2006-12-15

    Abstract: Thin film transistor (TFT) array substrate comprises gate lines (101) and data lines (102) crossing each other to define pixel regions on substrate; TFTs adjacent to each crossing point of one of gate lines and one of data lines, and each having gate electrode (101a) protruded from gate line, source electrode (102a) protruded from data line, and drain electrode (102b) adjacent the source electrode; pixel electrodes (103) on pixel regions, being adjacent the drain electrode; and transparent electrode patterns located adjacent one of data lines, where source electrodes protrude from data line. The TFTs further comprise a semiconductor layer and a gate insulating layer. The substrate further comprises a passivation layer, common lines on the pixel regions, common electrode, gate pad pattern (121), and gate pad terminal (123). An independent claim is included for a method for manufacturing a TFT array substrate.

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