公开(公告)号：WO0109930A3

公开(公告)日：2001-07-05

申请号：PCT/US0040344

申请日：2000-07-11

Applicant: SYMETRIX CORP ,  MATSUSHITA ELECTRONICS CORP

Inventor： MCMILLAN LARRY D ,  PAZ DE ARAUJO CARLOS A ,  ARITA KOJI ,  AZUMA MASAMICHI

IPC: H01L21/02 ,  H01L21/82 ,  H01L29/12 ,  H01L29/92

CPC classification number: C23C18/1216 ,  C23C18/1245 ,  C23C18/1279 ,  C23C18/1283 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75

Abstract: An integrated circuit capacitor (10, 25, 30, 402) containing a thin film of dielectric metaloxide (20, 420) is formed above a silicon germanium substrate (12, 406). A silicon nitride diffusion barrier layer (24, 324, 414) is deposited on a silicon germanium substrate to prevent evaporation of the substrate in subsequent heating steps. A silicon dioxide stress reduction layer is deposited on the diffusion barrier layer. A bottom electrode (16, 418) is formed on the stress reduction layer, then a liquid precursor is spun on the bottom electrode, dried at about 400 DEG C, and annealed at between 600 DEG C and 850 DEG C to form a BST capacitor dielectric (20, 420). A top electrode (22, 422) is deposited on the dielectric and annealed. The integrated circuit may also include a BiCMOS device, a HBT device or a MOSFET.

Abstract translation: 在硅锗基板（12,406）的上方形成包含介电金属氧化物（20,420）的薄膜的集成电路电容器（10,25,30,402）。 氮化硅扩散阻挡层（24,324,414）沉积在硅锗衬底上以防止随后的加热步骤中衬底的蒸发。 二氧化硅应力降低层沉积在扩散阻挡层上。 在应力降低层上形成底部电极（16,418），然后在底部电极上旋转液体前体，在约400℃下干燥，并在600℃和850℃之间退火以形成BST电容器 电介质（20,420）。 顶部电极（22,422）沉积在电介质上并退火。 集成电路还可以包括BiCMOS器件，HBT器件或MOSFET。

公开(公告)号：WO0156065A3

公开(公告)日：2001-12-27

申请号：PCT/JP0100466

申请日：2001-01-24

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： NASU TORU ,  ARITA KOJI

IPC: H01L21/02 ,  H01L21/314 ,  H01L21/316 ,  H01L21/8246 ,  H01L27/105 ,  H01L29/51

CPC classification number: H01L21/02197 ,  H01L21/02282 ,  H01L21/31691 ,  H01L28/55 ,  H01L29/516

Abstract: A coating of liquid precursor for forming a layered superlattice material is applied to a substrate, the substrate is dried and then pretreated using RTP at 450 DEG C for 5 minutes. Following the RTP, the substrate is annealed in an unreactive gas at a temperature not exceeding 800 DEG C, then annealed in oxygen gas at a temperature not exceeding 800 DEG C for one hour to form a thin film (124, 422) of layered superlattice material.

Abstract translation: 将用于形成层状超晶格材料的液体前体涂层施加到基底上，将基底干燥，然后使用RTP在450℃预处理5分钟。 在RTP之后，将衬底在不超过800℃的温度下在非活性气体中退火，然后在不超过800℃的温度下在氧气中退火1小时，以形成层状超晶格的薄膜（124,422） 材料。

公开(公告)号：WO9965051A3

公开(公告)日：2000-03-16

申请号：PCT/US9912717

申请日：1999-06-07

Applicant: SYMETRIX CORP ,  MATSUSHITA ELECTRONICS CORP

Inventor： KANO GOTA ,  SHIMADA YASUHIRO ,  HAYASHI SHINICHIRO ,  ARITA KOJI ,  PAZ DE ARAUJO CARLOS A ,  CUCHIARO JOSEPH D ,  MCMILLAN LARRY D

IPC: G02F1/136 ,  G02F1/13357 ,  G09F9/30 ,  H01J9/02 ,  H01J29/04 ,  H01J31/12 ,  H01J1/30

CPC classification number: G02F1/133603

Abstract: A thin film of ferroelectric layered superlattice material in a flat panel display device is energized to selectively influence the display image. In one embodiment, a voltage pulse causes the layered superlattice material to emit electrons that impinge upon a phosphor, causing the phosphor to emit light. In another embodiment, an electric potential creates a remanent polarization in the layered superlattice material, which exerts an electric field in liquid crystal layer, thereby influencing the transmissivity of light through the liquid crystal. The layered superlattice material is a metal oxide formed using an inventive liquid precursor containing an alkoxycarbolyxate. The thin film thickness is preferably in the range of 50-140 nm, so that polarizability and transparency of the thin film is enhanced. A display element may comprise a varistor device to prevent cross-talk between pixels and to enable sudden polarization switching. A functional gradient in the ferroelectric thin film enhances electron emission. Two ferroelectric elements, one on either side of the phosphor may be used to enhance luminescence. A phosphor can be sandwiched between a dielectric and a ferroelectric layer to enhance emission.

Abstract translation: 平板显示装置中的铁电层状超晶格材料薄膜被通电以选择性地影响显示图像。 在一个实施例中，电压脉冲使得层状超晶格材料发射撞击磷光体的电子，导致磷光体发光。 在另一个实施例中，电位在层状超晶格材料中产生剩余极化，其在液晶层中施加电场，从而影响透过液晶的透射率。 层状超晶格材料是使用本发明的含有烷氧基羧酸的液体前体形成的金属氧化物。 薄膜厚度优选在50-140nm的范围内，从而提高了薄膜的极化率和透明度。 显示元件可以包括用于防止像素之间的串扰并允许突发极化切换的变阻器装置。 铁电薄膜中的功能梯度增强了电子发射。 可以使用两个铁电元件，一个在荧光体的两侧，以增强发光。 磷光体可以夹在电介质和铁电层之间以增强发射。

公开(公告)号：DE69434606D1

公开(公告)日：2006-03-30

申请号：DE69434606

申请日：1994-08-03

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： ARITA KOJI ,  FUJII EIJI ,  SHIMADA YASUHIRO ,  UEMOTO YASUHIRO ,  INOUE ATSUO ,  NASU TORU ,  MATSUDA AKIHIRO ,  NAGANO YOSHIHISA ,  MATSUURA TAKETOSHI ,  OTSUKI TATSUO

IPC: H01L27/115 ,  H01L21/02 ,  H01L21/3205 ,  H01L21/8242 ,  H01L21/8246 ,  H01L29/92

Abstract: A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer, which covers the capacitor, and has a passivation layer which covers the interconnections of the capacitor. The passivation layer is composed of a phospho-silicate layer and a non-doped silicate layer formed sequentially from the interconnections side. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

公开(公告)号：DE69503532T2

公开(公告)日：1999-02-04

申请号：DE69503532

申请日：1995-02-10

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： NASU TORU ,  INOUE ATSUO ,  NAGANO YOSHIHISA ,  MATSUDA AKIHIRO ,  ARITA KOJI

IPC: H01L23/522 ,  H01L21/768 ,  H01L21/822 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/04 ,  H01L27/10 ,  H01L27/105 ,  H01L27/108 ,  H01L27/115 ,  H01L21/8239

公开(公告)号：DE69802393D1

公开(公告)日：2001-12-13

申请号：DE69802393

申请日：1998-03-12

Applicant: SYMETRIX CORP ,  MATSUSHITA ELECTRONICS CORP

Inventor： KANO GOTA ,  PAZ DE ARAUJO A ,  ARITA KOJI ,  SCOTT C ,  MCMILLAN D ,  HAYASHI SHINICHIRO

IPC: C03C17/27 ,  C03C17/25 ,  H01J9/20 ,  H01J11/02 ,  H01J29/89 ,  H01J9/24

Abstract: A new method (P200) is provided for making magnesium oxide layers (122) in plasma displays (100). A magnesium carboxylate liquid precursor solution is applied to a display panel (102), dried, and annealed to yield a solid magnesium oxide layer (122) having excellent electro-optical performance.

公开(公告)号：DE69426208T2

公开(公告)日：2001-05-17

申请号：DE69426208

申请日：1994-08-03

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： ARITA KOJI ,  FUJII EIJI ,  SHIMADA YASUHIRO ,  UEMOTO YASUHIRO ,  INOUE ATSUO ,  NASU TORU ,  MATSUDA AKIHIRO ,  NAGANO YOSHIHISA ,  MATSUURA TAKETOSHI ,  OTSUKI TATSUO

IPC: H01L21/02 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/115 ,  H01L21/3205 ,  H01L29/92

Abstract: A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer, which covers the capacitor, and has a passivation layer which covers the interconnections of the capacitor. The passivation layer is composed of a phospho-silicate layer and a non-doped silicate layer formed sequentially from the interconnections side. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

公开(公告)号：DE69503532D1

公开(公告)日：1998-08-27

申请号：DE69503532

申请日：1995-02-10

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： NASU TORU ,  INOUE ATSUO ,  NAGANO YOSHIHISA ,  MATSUDA AKIHIRO ,  ARITA KOJI

IPC: H01L23/522 ,  H01L21/768 ,  H01L21/822 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/04 ,  H01L27/10 ,  H01L27/105 ,  H01L27/108 ,  H01L27/115 ,  H01L21/8239

公开(公告)号：DE69317606D1

公开(公告)日：1998-04-30

申请号：DE69317606

申请日：1993-08-03

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： YOSHIIKE NOBUYUKI ,  ARITA KOJI ,  MORINAKA KATSUYA

IPC: G01V8/12 ,  G08B13/193 ,  G01J5/10 ,  G01J5/62

Abstract: A temperature distribution measurement apparatus (100) has an infrared array sensor (1) that comprises a pyroelectric substrate with infrared ray detecting electrodes, focusing means that includes and infrared lens (2) for focusing incident infrared rays on the infrared array sensor, cylindrical chopping means (4) for intermittenly shielding the plurality of detector elements from incident infrared rays and a driving means for continuously rotating a rotation member (3) which includes infrared array sensor (1). And this temperature distribution measurement apparatus combined with computational means and detector means is applied to determine number, position, and movements of persons in a space.

公开(公告)号：CA2205189C

公开(公告)日：2005-06-21

申请号：CA2205189

申请日：1997-05-13

Applicant: KOJUNDO CHEMICAL LAB CO LTD ,  SYMETRIX CORP ,  MATSUSHITA ELECTRONICS CORP

Inventor： HOCHIDO YUKOH ,  ARITA KOJI ,  MATSUMOTO MASAMICHI ,  KADOKURA HIDEKIMI ,  OTSUKI TATSUO ,  AZUMA MASAMICHI

IPC: C23C16/40 ,  C23C18/12 ,  H01L21/02 ,  H01L21/314 ,  H01L21/316 ,  H01G7/06

Abstract: A method of forming a Bi-layered ferroelectric thin film on a substrate with good reproducibility, using a mixed composition of a Bi-containing organic compound and a metal polyalkoxide compound by at least one technique selected from the group consisting of molecular deposition such as CVD, and spincoat-sintering.