公开(公告)号：DE69426208T2

公开(公告)日：2001-05-17

申请号：DE69426208

申请日：1994-08-03

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： ARITA KOJI ,  FUJII EIJI ,  SHIMADA YASUHIRO ,  UEMOTO YASUHIRO ,  INOUE ATSUO ,  NASU TORU ,  MATSUDA AKIHIRO ,  NAGANO YOSHIHISA ,  MATSUURA TAKETOSHI ,  OTSUKI TATSUO

IPC: H01L21/02 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/115 ,  H01L21/3205 ,  H01L29/92

Abstract: A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer, which covers the capacitor, and has a passivation layer which covers the interconnections of the capacitor. The passivation layer is composed of a phospho-silicate layer and a non-doped silicate layer formed sequentially from the interconnections side. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

公开(公告)号：DE69315125D1

公开(公告)日：1997-12-18

申请号：DE69315125

申请日：1993-06-18

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： FUJII EIJI ,  SHIMADA YASUHIRO ,  UEMOTO YASUHIRO ,  NASU TOORU ,  MATSUDA AKIHIRO ,  OOTSUKI TATSUO

IPC: H01L21/02 ,  H01L21/8242 ,  H01L27/108 ,  H01L27/12 ,  H01L29/786 ,  H01L29/92 ,  H01L29/94

Abstract: A semiconductor device comprises an integrated circuit and a capacitor formed on a semiconductor substrate. The capacitor comprises a bottom electrode (116) connected to a diffusion layer (113) of the integrated circuit, a dielectric film (114) formed on the bottom electrode, and a top electrode (103) of a conductive film being formed on the dielectric film.

公开(公告)号：DE68917654D1

公开(公告)日：1994-09-29

申请号：DE68917654

申请日：1989-06-23

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： NAKAMURA AKIRA ,  SENDA KOHJI ,  FUJII EIJI ,  EMOTO FUMIAKI ,  UEMOTO YASUHIRO ,  YAMAMOTO ATSUYA ,  KOBAYASHI KAZUNORI

IPC: G02F1/1337 ,  C08F220/54 ,  G02F1/1343 ,  G02F1/136 ,  G02F1/1368 ,  H01L21/336 ,  H01L27/12 ,  H01L29/78 ,  H01L29/786 ,  G02F1/133

公开(公告)号：CA1308471C

公开(公告)日：1992-10-06

申请号：CA603676

申请日：1989-06-22

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： NAKAMURA AKIRA ,  SENDA KOHJI ,  FUJII EIJI ,  EMOTO FUMIAKI ,  UEMOTO YASUHIRO ,  YAMAMOTO ATSUYA ,  KOBAYASHI KAZUNORI

IPC: G02F1/1337 ,  C08F220/54 ,  G02F1/1343 ,  G02F1/136 ,  G02F1/1368 ,  H01L21/336 ,  H01L27/12 ,  H01L29/78 ,  H01L29/786 ,  G02F1/133

Abstract: In an image display device comprising thin film transistors and pixel electrodes arranged in a matrix form on a substrate, a semiconductor layer forming a channel region of the thin film transistor also serves as the pixel electrode, thereby making the structure of the device simple and facilitating the fabrication of the device.

公开(公告)号：DE69434606D1

公开(公告)日：2006-03-30

申请号：DE69434606

申请日：1994-08-03

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： ARITA KOJI ,  FUJII EIJI ,  SHIMADA YASUHIRO ,  UEMOTO YASUHIRO ,  INOUE ATSUO ,  NASU TORU ,  MATSUDA AKIHIRO ,  NAGANO YOSHIHISA ,  MATSUURA TAKETOSHI ,  OTSUKI TATSUO

IPC: H01L27/115 ,  H01L21/02 ,  H01L21/3205 ,  H01L21/8242 ,  H01L21/8246 ,  H01L29/92

Abstract: A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer, which covers the capacitor, and has a passivation layer which covers the interconnections of the capacitor. The passivation layer is composed of a phospho-silicate layer and a non-doped silicate layer formed sequentially from the interconnections side. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

公开(公告)号：DE69317940T2

公开(公告)日：1998-11-26

申请号：DE69317940

申请日：1993-06-14

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： FUJII EIJI ,  SHIMADA YASUHIRO ,  UEMOTO YASUHIRO ,  HAYASHI SHINITIROU ,  NASU TOORU ,  ARITA KOICHI ,  INOUE ATSUO ,  MATSUDA AKIHIRO ,  KIBE MASAKI ,  OOTSUKI TATSUO

IPC: H01L21/02 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/06 ,  H01L27/115 ,  H01L29/92 ,  H01L21/329

公开(公告)号：DE69315125T2

公开(公告)日：1998-06-10

申请号：DE69315125

申请日：1993-06-18

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： FUJII EIJI ,  SHIMADA YASUHIRO ,  UEMOTO YASUHIRO ,  NASU TOORU ,  MATSUDA AKIHIRO ,  OOTSUKI TATSUO

IPC: H01L21/02 ,  H01L21/8242 ,  H01L27/108 ,  H01L27/12 ,  H01L29/786 ,  H01L29/92 ,  H01L29/94

Abstract: A semiconductor device comprises an integrated circuit and a capacitor formed on a semiconductor substrate. The capacitor comprises a bottom electrode (116) connected to a diffusion layer (113) of the integrated circuit, a dielectric film (114) formed on the bottom electrode, and a top electrode (103) of a conductive film being formed on the dielectric film.

公开(公告)号：DE69434606T2

公开(公告)日：2006-11-30

申请号：DE69434606

申请日：1994-08-03

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： ARITA KOJI ,  FUJII EIJI ,  SHIMADA YASUHIRO ,  UEMOTO YASUHIRO ,  INOUE ATSUO ,  NASU TORU ,  MATSUDA AKIHIRO ,  NAGANO YOSHIHISA ,  MATSUURA TAKETOSHI ,  OTSUKI TATSUO

IPC: H01L27/115 ,  H01L21/02 ,  H01L21/3205 ,  H01L21/8242 ,  H01L21/8246 ,  H01L29/92

Abstract: A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer, which covers the capacitor, and has a passivation layer which covers the interconnections of the capacitor. The passivation layer is composed of a phospho-silicate layer and a non-doped silicate layer formed sequentially from the interconnections side. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

公开(公告)号：DE69426208D1

公开(公告)日：2000-11-30

申请号：DE69426208

申请日：1994-08-03

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： ARITA KOJI ,  FUJII EIJI ,  SHIMADA YASUHIRO ,  UEMOTO YASUHIRO ,  INOUE ATSUO ,  NASU TORU ,  MATSUDA AKIHIRO ,  NAGANO YOSHIHISA ,  MATSUURA TAKETOSHI ,  OTSUKI TATSUO

IPC: H01L21/02 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/115 ,  H01L21/3205 ,  H01L29/92

Abstract: A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer, which covers the capacitor, and has a passivation layer which covers the interconnections of the capacitor. The passivation layer is composed of a phospho-silicate layer and a non-doped silicate layer formed sequentially from the interconnections side. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

公开(公告)号：DE69317940D1

公开(公告)日：1998-05-20

申请号：DE69317940

申请日：1993-06-14

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： FUJII EIJI ,  SHIMADA YASUHIRO ,  UEMOTO YASUHIRO ,  HAYASHI SHINITIROU ,  NASU TOORU ,  ARITA KOICHI ,  INOUE ATSUO ,  MATSUDA AKIHIRO ,  KIBE MASAKI ,  OOTSUKI TATSUO

IPC: H01L21/02 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/06 ,  H01L27/115 ,  H01L29/92 ,  H01L21/329