PHASE LOCK LOOP LOCK INDICATOR
    1.
    发明申请
    PHASE LOCK LOOP LOCK INDICATOR 审中-公开
    相位锁定锁定指示器

    公开(公告)号:WO2014130913A8

    公开(公告)日:2015-12-10

    申请号:PCT/US2014017882

    申请日:2014-02-24

    CPC classification number: H03L7/087 H03K5/26 H03L7/089 H03L7/095 H03L7/097

    Abstract: A lock-on detection circuit for a phase-locked loop includes circuitry configured to receive first up and down outputs and second up and down outputs from one or more phase detectors and to determine from the first up and down outputs and the second up and down outputs how well the phase-locked loop is locked on to a reference clock.

    Abstract translation: 用于锁相环的锁定检测电路包括被配置为从一个或多个相位检测器接收第一上下输出和第二上下输出的电路,并且从第一上,下输出和第二上下确定 输出锁相环锁定到参考时钟的程度。

    USB REGULATOR WITH CURRENT BUFFER TO REDUCE COMPENSATION CAPACITOR SIZE AND PROVIDE FOR WIDE RANGE OF ESR VALUES OF EXTERNAL CAPACITOR
    2.
    发明申请
    USB REGULATOR WITH CURRENT BUFFER TO REDUCE COMPENSATION CAPACITOR SIZE AND PROVIDE FOR WIDE RANGE OF ESR VALUES OF EXTERNAL CAPACITOR 审中-公开
    具有电流缓冲器的USB调节器,以减少补偿电容器尺寸并提供大范围的外部电容ESR值

    公开(公告)号:WO2014159507A3

    公开(公告)日:2014-12-24

    申请号:PCT/US2014023962

    申请日:2014-03-12

    Abstract: A voltage regulator comprises a large gm current buffer driver added between a first stage of an operation amplifier and a last stage power transistor. This current buffer allows a significant reduction in the maximum internal and external compensation capacitances needed for regulator stability. The current buffer compensation circuit allows a wide range of external capacitor sizes that increases the flexibility in choosing the external capacitor types (with low to high ESR ratings).

    Abstract translation: 电压调节器包括在运算放大器的第一级和最后级功率晶体管之间增加的大gm电流缓冲器驱动器。 该电流缓冲器可显着降低稳压器稳定性所需的最大内部和外部补偿电容。 电流缓冲补偿电路允许宽范围的外部电容器尺寸,这增加了选择外部电容器类型(从低到高ESR额定值)的灵活性。

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