Microprocesador o microcontrolador potenciado

    公开(公告)号:ES2396800T3

    公开(公告)日:2013-02-27

    申请号:ES08857235

    申请日:2008-11-26

    Abstract: Un dispositivo de microprocesador de n bits que comprende: una unidad central de procesamiento de n bits (CPU); una pluralidad de registros (185) de funciones especiales y de registros de proposito general con los que seestablece una correlacion en memoria con una pluralidad de bancos, en el que los registros (185) de funcionesespeciales comprenden por lo menos dos registros (150; 960) de direccion de memoria indirecta de 16 bits a losque puede acceder dicha CPU a traves de todos los bancos; una unidad de acceso a banco para acoplar dicha CPU con uno de dicha pluralidad de bancos; una memoria (160) de datos acoplada con la CPU; y una memoria (120) de programa acoplada con la CPU, en el que dichos registros (150; 960) de direccion de memoria indirecta pueden accionarse para acceder a dichamemoria (160) de datos o memoria (120) de programa y en el que un bit (965) en cada uno de dichos registros(150; 960) de direccion de memoria indirecta determina un acceso a dicha memoria (160) de datos o a dichamemoria (120) de programa.

    Functional pathway configuration at a system/ic interface

    公开(公告)号:AU2002247034A8

    公开(公告)日:2008-05-08

    申请号:AU2002247034

    申请日:2002-01-25

    Abstract: The present invention relates generally to functional pathway configurations at the interfaces between integrated circuits (ICs) and the circuit assemblies with which the ICs communicate. More particularly, the present invention relates generally to the functional pathway configuration at the interface between a semiconductor chip including an IC (e.g., computer chips like microcontrollers and microprocessors) and the circuitry of a system including the chip. Even more particularly, the present invention relates to a 20-pin microcontroller functional pathway configuration for the interface between the microcontroller and a system in which the microcontroller is embedded.

    Functional pathway configuration at a system/ic interface

    公开(公告)号:AU2002247034A1

    公开(公告)日:2002-08-06

    申请号:AU2002247034

    申请日:2002-01-25

    Abstract: The present invention relates generally to functional pathway configurations at the interfaces between integrated circuits (ICs) and the circuit assemblies with which the ICs communicate. More particularly, the present invention relates generally to the functional pathway configuration at the interface between a semiconductor chip including an IC (e.g., computer chips like microcontrollers and microprocessors) and the circuitry of a system including the chip. Even more particularly, the present invention relates to a 20-pin microcontroller functional pathway configuration for the interface between the microcontroller and a system in which the microcontroller is embedded.

    FUNCTIONAL PATHWAY CONFIGURATION AT A SYSTEM/IC INTERFACE
    7.
    发明申请
    FUNCTIONAL PATHWAY CONFIGURATION AT A SYSTEM/IC INTERFACE 审中-公开
    功能路径配置在系统/ IC接口

    公开(公告)号:WO0223351A9

    公开(公告)日:2003-04-03

    申请号:PCT/US0128844

    申请日:2001-09-14

    CPC classification number: G06F15/7832

    Abstract: The present invention relates generally to functional pathway configurations at the interfaces between integrated circuits (ICs) and the circuit assemblies with which the ICs communicate. More particularly, the present invention relates generally to the functional pathway configuration at the interface between a semiconductor chip including an IC (e.g., computer chips like microcontrollers and microprocessors) and the circuitry of a system including the chip. Even more particularly, the present invention relates to a 20-pin microcontroller functional pathway configuration for the interface between the microcontroller and a system in which the microcontroller is embedded.

    Abstract translation: 本发明一般涉及集成电路(IC)与IC连接的电路组件之间的接口上的功能通路配置。 更具体地,本发明一般涉及包括IC的半导体芯片(例如,诸如微控制器和微处理器的计算机芯片)之间的界面处的功能路径配置以及包括该芯片的系统的电路。 更具体地说,本发明涉及用于微控制器与嵌入微控制器的系统之间的接口的20引脚微控制器功能通路配置。

    CONFIGURABLE MIXED ANALOG AND DIGITAL MODE CONTROLLER SYSTEM
    8.
    发明申请
    CONFIGURABLE MIXED ANALOG AND DIGITAL MODE CONTROLLER SYSTEM 审中-公开
    可配置混合模拟和数字模式控制器系统

    公开(公告)号:WO0237298A2

    公开(公告)日:2002-05-10

    申请号:PCT/US0146750

    申请日:2001-11-05

    CPC classification number: G06J1/00

    Abstract: A configurable mixed analog and digital mode controller may be fabricated as a single monolithic device such as an integrated circuit semiconductor die or a multi-chip package (MCP). The configurable mixed analog and digital mode controller may be a microcontroller and/or a digital signal processor (DSP) in combination with both analog and digital peripherals that may be configured and connected together, both before and during operation thereof, to function as a complete controller system.

    Abstract translation: 可以将可配置的混合模拟和数字模式控制器制造为诸如集成电路半导体管芯或多芯片封装(MCP)的单个单片器件。 可配置的混合模拟和数字模式控制器可以是微控制器和/或数字信号处理器(DSP)与模拟和数字外围设备的组合,其可以在其操作之前和期间被配置和连接在一起,以用作完整的 控制器系统。

    A PRECISION RELAXATION OSCILLATOR WITH TEMPERATURE COMPENSATION AND VARIOUS OPERATING MODES
    9.
    发明申请
    A PRECISION RELAXATION OSCILLATOR WITH TEMPERATURE COMPENSATION AND VARIOUS OPERATING MODES 审中-公开
    具有温度补偿和各种工作模式的精密弛豫振荡器

    公开(公告)号:WO0036745A9

    公开(公告)日:2000-11-23

    申请号:PCT/US9928910

    申请日:1999-12-06

    CPC classification number: H03K3/0231 H03K3/011

    Abstract: A precision relaxation oscillator with temperature compensation produces a stable clock frequency over wide variations of ambient temperature. The invention has an oscillation generator (100), two independent current generators (200, 300), a transition detector (400) and a clock inhibiter (500). The outputs of the two programmable, independent current generators are combined to provide a capacitor charging current which is independent of temperature. The precision relaxation oscillator is capable of three modes of operation: fast mode, slow/low power mode and sleep mode. The precision relaxation oscillator with temperature compensation and various operating modes is implemented on a single, monolithic integrated circuit.

    Abstract translation: 具有温度补偿的精密张弛振荡器可在环境温度变化很大的情况下产生稳定的时钟频率。 本发明具有振荡发生器(100),两个独立的电流发生器(200,300),转换检测器(400)和时钟禁止器(500)。 两个可编程独立电流发生器的输出相结合,可提供与温度无关的电容充电电流。 精密张弛振荡器具有三种工作模式:快速模式,慢速/低功耗模式和睡眠模式。 具有温度补偿和各种工作模式的精密张弛振荡器在单个单片集成电路上实现。

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