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公开(公告)号:DE69231227T2
公开(公告)日:2001-03-01
申请号:DE69231227
申请日:1992-11-12
Applicant: MICROCHIP TECH INC
Inventor: BERMAN ERIC , ITALIANO GREG , PADGAONKAR AJAY , ALLEN RAY
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公开(公告)号:DE69231227D1
公开(公告)日:2000-08-10
申请号:DE69231227
申请日:1992-11-12
Applicant: MICROCHIP TECH INC
Inventor: BERMAN ERIC , ITALIANO GREG , PADGAONKAR AJAY , ALLEN RAY
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公开(公告)号:EP0612422A4
公开(公告)日:1996-05-22
申请号:EP92924264
申请日:1992-11-12
Applicant: MICROCHIP TECH INC
Inventor: BERMAN ERIC , ITALIANO GREG , PADGAONKAR AJAY , ALLEN RAY
CPC classification number: G06F9/30145 , G06F9/30167 , G06F11/2236 , G06F11/261 , G06F15/7814
Abstract: A microcontroller fabricated on a semiconductor chip has an on-chip EPROM program memory with programmable EPROM configuration fuses located in a limited number of addresses of the on-chip program memory, the condition of each of EPROM fuse being defined as blown or not blown according to the value of the bit stored in the respective address of the on-chip program memory. The operating modes of the microcontroller are configurable by appropriately programming at least some of the EPROM fuses. Testing of the microcontroller in at least some of the operating modes is achieved by using latches outside the program memory to emulate the EPROM fuses, while suppressing the capability to set the condition of the EPROM fuses during the testing. Upon completion of the testing, control of the operating modes of the microcontroller is returned to the EPROM fuses, and the latches are precluded from further emulating the EPROM fuses.
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