公开(公告)号：AT337602T

公开(公告)日：2006-09-15

申请号：AT01106031

申请日：2001-03-12

Applicant: MICROCHIP TECH INC

Inventor： GERBER DONALD S ,  SHIELDS JEFFREY ,  HEWITT KENT D ,  DAVIES DAVID M

IPC: G11C16/02 ,  G11C16/10 ,  G11C16/14 ,  G11C16/34 ,  H01L21/8247 ,  H01L27/115

Abstract: A method of writing and selectively erasing bits in a selected group of memory cells that significantly reduces the likelihood of disturbing data stored in other, non-selected groups of memory cells is disclosed. The method varies the bias voltages applied to bit lines in unselected cells depending upon the selected or non-selected state of the cells. This reduces the voltage differential applied to the unselected cells, reducing the possibility of inadvertently causing unwanted changes in the amount of charge stored on the respective floating gates of the unselected cells. The method of the present invention improves electrical isolation between columns of cells without increasing the distance between the cells.

公开(公告)号：DE60122412T2

公开(公告)日：2007-05-03

申请号：DE60122412

申请日：2001-03-12

Applicant: MICROCHIP TECH INC

Inventor： GERBER DONALD S ,  SHIELDS JEFFREY ,  HEWITT KENT D ,  DAVIES DAVID M

IPC: G11C16/02 ,  G11C16/10 ,  G11C16/14 ,  G11C16/34 ,  H01L21/8247 ,  H01L27/115

Abstract: A method of writing and selectively erasing bits in a selected group of memory cells that significantly reduces the likelihood of disturbing data stored in other, non-selected groups of memory cells is disclosed. The method varies the bias voltages applied to bit lines in unselected cells depending upon the selected or non-selected state of the cells. This reduces the voltage differential applied to the unselected cells, reducing the possibility of inadvertently causing unwanted changes in the amount of charge stored on the respective floating gates of the unselected cells. The method of the present invention improves electrical isolation between columns of cells without increasing the distance between the cells.

公开(公告)号：DE60122412D1

公开(公告)日：2006-10-05

申请号：DE60122412

申请日：2001-03-12

Applicant: MICROCHIP TECH INC

Inventor： GERBER DONALD S ,  SHIELDS JEFFREY ,  HEWITT KENT D ,  DAVIES DAVID M

IPC: G11C16/02 ,  G11C16/10 ,  G11C16/14 ,  G11C16/34 ,  H01L21/8247 ,  H01L27/115

Abstract: A method of writing and selectively erasing bits in a selected group of memory cells that significantly reduces the likelihood of disturbing data stored in other, non-selected groups of memory cells is disclosed. The method varies the bias voltages applied to bit lines in unselected cells depending upon the selected or non-selected state of the cells. This reduces the voltage differential applied to the unselected cells, reducing the possibility of inadvertently causing unwanted changes in the amount of charge stored on the respective floating gates of the unselected cells. The method of the present invention improves electrical isolation between columns of cells without increasing the distance between the cells.