Abstract:
The present invention relates generally to functional pathway configurations at the interfaces between integrated circuits (ICs) and the circuit assemblies with which the ICs communicate. More particularly, the present invention relates generally to the functional pathway configuration at the interface between one or more semiconductor integrated circuit dice, including an IC package and the circuitry of a system wherein the integrated circuit dice is a digital signal controller. Even more particularly, the present invention relates to a 18, 28, 40, 44, 64 or 80 pin functional pathway configuration for the interface between the digital signal controller and the system in which it is embedded.
Abstract:
A dual port random access memory (RAM) stores data representative of information to be displayed on the LCD. The RAM includes a plurality of master data storage latches (150-153) and a single slave data storage latch (154) shared by all of the plurality of master storage latches (150-153). A microcontroller has a central processing unit (CPU) for communicating with the master storage latches (150-153) via one of the RAM ports to periodically change the data stored therein. An LCD control module successively updates the data in the single slave storage latch (154) with data from each of the master storage latches (150-153) and downloads the updated data from the single slave storage latch (154) to a temporary store associated with the LCD after each update from a master storage latch and before the update of data from the next master storage latch.
Abstract:
Method and apparatus for controlling the updating of a random access memory (RAM, 137) that stores data for coding the activation of segments of one or more alphanumeric characters of a liquid crystal display (LCD) (30), to maintain substantially a direct current (DC) voltage value of zero across transparent conductive plates of the LCD (30), is performed or provided in a microcontroller having internal LCD (137) control capabilities. A type B waveform is employed for activiting the LCD (30), the waveform being of a type in which data is transmitted over frames, the data in the second frame of which is inverse of data in the first frame thereof to maintain an average DC voltage value over each two-frame portion of the waveform at substantially zero volt.
Abstract:
Method and apparatus for controlling the updating of a random access memory (RAM, 137) that stores data for coding the activation of segments of one or more alphanumeric characters of a liquid crystal display (LCD) (30), to maintain substantially a direct current (DC) voltage value of zero across transparent conductive plates of the LCD (30), is performed or provided in a microcontroller having internal LCD (137) control capabilities. A type B waveform is employed for activiting the LCD (30), the waveform being of a type in which data is transmitted over frames, the data in the second frame of which is inverse of data in the first frame thereof to maintain an average DC voltage value over each two-frame portion of the waveform at substantially zero volt.
Abstract:
A microcontroller (50) chip (51) includes a charge pump with a switched-capacitor (83) that develops a plurality of discrete voltages. A switched-capacitor (83) charging circuit selectively charges a capacitor to produce successive charges individually retrievable from the capacitor. An LCD driver (173) selectively transmits the discrete operating voltage levels to activate the LCD (10) according to status of an external system under the control of the microcontroller (50). Voltage losses that may occur during the switched-capacitor (83) charging are compensated to maintain the levels of the discrete operating voltages free of decay. Compensation is achieved by overcharging the capacitor (83) by an amount substantially equivalent to the amount of voltage loss on the capacitor, using active feedback obtained from monitoring the charge on the capacitor.
Abstract:
An instruction set is provided that features ninety four instructions and various address modes to deliver a mixture of flexible micro-controller like instructions and specialized digital signal processor (DSP) instructions that execute from a single instruction stream.
Abstract:
A method is disclosed for testing a high speed microcontroller fabricated on a semiconductor chip (figure 4), and for testing relatively low speed functions of a liquid crystal display (LCD) module (figure 2) on the chip that drives an off-chip LCD for an external system to be controlled by the microcontroller with a plurality of discrete analog voltage levels for performing the LCD functions. Digital values of the discrete analog voltage levels are multiplexed in time slots of a test waveform to simulate in high speed digital format in a test mode the low speed timing, relative magnitude and functionality of the analog voltage levels used to drive the LCD. A high speed driver is selectively coupled to a pin of the chip, to which the discrete analog voltage levels are normally applied at low speed to drive the LCD, and the test waveform is applied to the high speed driver. The digital value and timing that appear on the pin are then monitored as an indication of proper functionality of the LCD module. The high speed driver is switched out and the normal low speed LCD driver is switched back for return to an LCD user mode when the test mode is completed. Monitoring the pin with a digital tester allows verification that pulses at the pin in predetermined time slots indicate the corresponding analog voltage level is being applied at the proper time during normal operation of the LCD module, and digitally testing of continuity in an analog channel. A transistor normally employed on the chip for electrostatic discharge protection is activated to selectively couple the high speed driver to the pin for the high speed testing mode.
Abstract:
A device including a microcontroller fabricated on a semiconductor chip is used to control an LCD display of an external system intended to be controlled by the microcontroller. The microcontroller enters a sleep state in which it operates in a battery power conservation mode during periods of time when functional activity of the microcontroller is reduced. The microcontroller awakens from the sleep state for resumption of activity when such a period ends. Timing to the LCD is decoupled from the microcontroller's own internal clock when the independent internal on-chip clock, which may be an RC oscillator, is selected by the user of the device. This allows the chip to continue to drive the LCD display even though the microcontroller's internal clock has stopped during the sleep.