公开(公告)号：MY171066A

公开(公告)日：2019-09-24

申请号：MYPI2014003297

申请日：2014-11-25

Applicant: MIMOS BERHAD

Inventor： ROZITA BORHAN ,  WEE LEONG SON ,  MUHAMAD KHAIROL BIN AB RANI

Abstract: [0030] There is disclosed a system for transferring data between two asynchronous clock domains, thus having at least a source clock (first clock domain) and a receiving clock (second clock domain); the system comprising: a multiplexer (20) for providing the first input; a register (30, 90) configured for receiving and storing data input at the first clock domain (1) and second clock domain (2); a comparison module (40,70) at the first clock domain (1) and second clock domains (2) configured for receiving incoming data input comparing data inputs; a controller (50, 80) at the first clock domain (1) and second clock domain (2) configured to receive the comparison output and toggling at least one signal (in2out) if a data change is detected based on the comparison; at least one synchronizer (60) to synchronizes signals into the second clock domain (2).

公开(公告)号：MY168512A

公开(公告)日：2018-11-12

申请号：MYPI2014700879

申请日：2014-04-09

Applicant: MIMOS BERHAD

Inventor： MUHAMAD KHAIROL BIN AB RANI

Abstract: The present invention relates to a system and a method for obtaining a quotient from a division of a dividend by a divisor. The division system includes a decoder (120) and multiplier circuits. The decoder (120) is used in place of the normally required lookup table circuit providing an approximation of a reciprocal of a divisor input. The multiplier circuits receive the approximation and using a modified Taylor series expansion to obtain the division result. Most illustrative drawing: Figure 2