-
公开(公告)号:JPH1051246A
公开(公告)日:1998-02-20
申请号:JP8564397
申请日:1997-03-19
Applicant: MOTOROLA INC
Inventor: DOTSON ROBERT N , GRIFFITH RICHARD S , PETTY THOMAS D , VYNE ROBERT L
Abstract: PROBLEM TO BE SOLVED: To provide a conventional operational amplifier receiving its power from a battery. SOLUTION: The low-voltage operational amplifier 10 is operated at a voltage range of 1-8V over a temperature range of 0 to 70 deg.C. An input stage 12 employs an N-channel depletion mode MOSFET, to amplify differential inputs and for maintaining a prescribed mutual conductance. A source follower MOSFET 13 provides a single gain to a base of a current sink transistor(TR) 18 in the transfer of an AC signal 'stage 1 output'. A sink control circuit 14 and a source-control circuit 22 generate a base drive current in TRs 18, 24. The input signal controls the sink TR through an AC signal path for a 'sink path' signal or a 'source path' signal is generated through a trans-linear loop 16. An output stage provides a sink and source current of about 50mA.
-
公开(公告)号:DE69409088D1
公开(公告)日:1998-04-23
申请号:DE69409088
申请日:1994-12-19
Applicant: MOTOROLA INC
Inventor: STOCKSTAD TROY L , VYNE ROBERT L , PETTY THOMAS D
-
公开(公告)号:DE69409088T2
公开(公告)日:1998-09-10
申请号:DE69409088
申请日:1994-12-19
Applicant: MOTOROLA INC
Inventor: STOCKSTAD TROY L , VYNE ROBERT L , PETTY THOMAS D
-
公开(公告)号:DE69118984D1
公开(公告)日:1996-05-30
申请号:DE69118984
申请日:1991-07-24
Applicant: MOTOROLA INC
Inventor: VYNE ROBERT L , PETTY THOMAS D
IPC: H03F1/02
Abstract: An amplifier (50) having an input and output stage for providing drive current to a load (RL) coupled thereto includes circuitry (42, 44, 46, 52) that senses when an input signal is applied to the amplifier and is responsive thereto for providing an enabling signal at an output thereof and current regulator circuitry (20, 22) that supplies a low drain current to bias the stages when the amplifier is in a quiescent operating mode absent an applied input signal and that is responsive to the enabling signal for increasing the current supplied to the stages to bias the same in a high bias drain current operating mode.
-
公开(公告)号:SG43164A1
公开(公告)日:1997-10-17
申请号:SG1996004692
申请日:1994-12-01
Applicant: MOTOROLA INC
Inventor: HALL JEFFERSON W , PETTY THOMAS D , YEE RENWIN K , VYNE ROBERT L , STOCKSTAD TROY L
Abstract: A pulsed battery charger circuit (11) for charging a battery (28). A control circuit (17) is responsive to a sense circuit (16) that monitors the battery voltage. The control circuit (17) pulses a first current source (25) or a second current source (20). An amplifier (14) is responsive to the first (25) and second (20) current sources for generating first and second predetermined voltages between a drive output (12) and a sense input (13). The first current source (25) is pulsed when the sense circuit (16) senses the battery voltage to be less than a first threshold voltage. The second current source (20) is pulsed when the sense circuit (16) senses the battery voltage to be greater than the first threshold voltage. Both the first (25) and second (20) current sources are disabled when the sense circuit (16) senses the battery voltage to be greater than a second threshold voltage.
-
公开(公告)号:CA2169706A1
公开(公告)日:1996-09-04
申请号:CA2169706
申请日:1996-02-16
Applicant: MOTOROLA INC
Inventor: STOCKSTAD TROY LYNN , PETTY THOMAS D , YEE RENWIN J
Abstract: A battery charge control circuit (10) senses the charge condition of cells in a battery pack (12, 14, 16, 18) using measurement circuit (51). Upon detection of a single undervoltage cell, the charge control circuit is placed in a sleep mode. Pack sense circuit (240) senses when the battery pack is placed in a charger. If circuit (10) was in a sleep mode, it is awakened. If any cell is measured over-voltage, the status is checked versus the other cells. If all the cells are over-voltage, the battery is considered balanced. If one or more cells are not over-voltage, control circuit (32) activates a discharge transistor (212, 214, 216, 218), discharging the cell within a hysteresis voltage below the over-voltage limit. Charge balancing of cells is continued until the cells are within a programmable hysteresis voltage of each other.
-
公开(公告)号:DE69128863T2
公开(公告)日:1998-08-06
申请号:DE69128863
申请日:1991-09-30
Applicant: MOTOROLA INC
Inventor: PETTY THOMAS D , VYNE ROBERT L
IPC: H03K17/30 , H03K5/1534 , H03F3/343 , G05F3/30 , H03K17/14
Abstract: A detector circuit (10) responsive to a current supplied to an input (14) thereof provides an output signal when the magnitude of the current exceeds a predetermined threshold level includes a multi-collector transistor (12) having a first one of its collectors connected to the base thereof and an emitter coupled to the input. A diode (16) formed by a diode-connected transistor is coupled to the first collector of the multi-collector transistor. A second transistor (20) is provided having its collector coupled to the second collector of the multi-collector transistor, a base coupled to the first collector and an emitter which is coupled to a pair of series connected resistors. The second transistor is operated at a lower current density than the diode- connected transistor such that the former operates in a saturated condition until such time that the input current exceeds the threshold level to produce the output signal.
-
公开(公告)号:DE69128863D1
公开(公告)日:1998-03-12
申请号:DE69128863
申请日:1991-09-30
Applicant: MOTOROLA INC
Inventor: PETTY THOMAS D , VYNE ROBERT L
IPC: H03K17/30 , H03K5/1534 , H03F3/343 , G05F3/30 , H03K17/14
Abstract: A detector circuit (10) responsive to a current supplied to an input (14) thereof provides an output signal when the magnitude of the current exceeds a predetermined threshold level includes a multi-collector transistor (12) having a first one of its collectors connected to the base thereof and an emitter coupled to the input. A diode (16) formed by a diode-connected transistor is coupled to the first collector of the multi-collector transistor. A second transistor (20) is provided having its collector coupled to the second collector of the multi-collector transistor, a base coupled to the first collector and an emitter which is coupled to a pair of series connected resistors. The second transistor is operated at a lower current density than the diode- connected transistor such that the former operates in a saturated condition until such time that the input current exceeds the threshold level to produce the output signal.
-
公开(公告)号:SG46260A1
公开(公告)日:1998-02-20
申请号:SG1996001661
申请日:1991-07-24
Applicant: MOTOROLA INC
Inventor: VYNE ROBERT L , PETTY THOMAS D
IPC: H03F1/02
Abstract: An amplifier (50) having an input and output stage for providing drive current to a load (RL) coupled thereto includes circuitry (42, 44, 46, 52) that senses when an input signal is applied to the amplifier and is responsive thereto for providing an enabling signal at an output thereof and current regulator circuitry (20, 22) that supplies a low drain current to bias the stages when the amplifier is in a quiescent operating mode absent an applied input signal and that is responsive to the enabling signal for increasing the current supplied to the stages to bias the same in a high bias drain current operating mode.
-
公开(公告)号:DE69118984T2
公开(公告)日:1996-10-31
申请号:DE69118984
申请日:1991-07-24
Applicant: MOTOROLA INC
Inventor: VYNE ROBERT L , PETTY THOMAS D
IPC: H03F1/02
Abstract: An amplifier (50) having an input and output stage for providing drive current to a load (RL) coupled thereto includes circuitry (42, 44, 46, 52) that senses when an input signal is applied to the amplifier and is responsive thereto for providing an enabling signal at an output thereof and current regulator circuitry (20, 22) that supplies a low drain current to bias the stages when the amplifier is in a quiescent operating mode absent an applied input signal and that is responsive to the enabling signal for increasing the current supplied to the stages to bias the same in a high bias drain current operating mode.
-
-
-
-
-
-
-
-
-