公开(公告)号：WO2003021637A2

公开(公告)日：2003-03-13

申请号：PCT/US2002/027073

申请日：2002-08-23

Applicant: MOTOROLA, INC.

Inventor： CONNELL, Lawrence, E. ,  HOLLENBECK, Neal, W. ,  BUSHMAN, Michael, Lee ,  MCCARTHY, Daniel, Patrick

IPC: H01L

CPC classification number: G05F1/56 ,  H03L7/0891 ,  H03L7/18

Abstract: A regulation circuit (30), incorporated in a single integrated circuit with a first circuit load, which as an input coupled to a power supply (310) which produces a source voltage, and a first output coupled to the first circuit load. The regulation circuit (30) comprises an input capacitor (109) for reducing the magnitude of a voltage change at the first output, and at least a first voltage regulator (112) for producing a predetermined voltage at the first load.

Abstract translation: 一种调节电路（30），其结合在具有第一电路负载的单个集成电路中，其作为耦合到产生源极电压的电源（310）的输入以及耦合到第一电路负载的第一输出。 调节电路（30）包括用于减小第一输出端的电压变化幅度的输入电容器（109）和用于在第一负载下产生预定电压的至少第一电压调节器（112）。

公开(公告)号：WO1996035258A1

公开(公告)日：1996-11-07

申请号：PCT/US1996003801

申请日：1996-03-21

Applicant: MOTOROLA INC.

Inventor： MOTOROLA INC. ,  BUSHMAN, Michael, L. ,  CONNELL, Lawrence, E.

IPC: H03F03/45

CPC classification number: H03F3/45076

Abstract: A low-voltage differential amplifier (10) includes a circuit (12) having a differential pair (14) and loads (22 and 24). The first load (22) can include a first embedded differential amplifier (30) and an output transistor (32) and the second load (24) can include a second embedded differential amplifier (36) and an output transistor (38). The differential amplifier (10) can provide a wide-voltage operable range. The differential amplifier (10) is particularly useful in connection with low-voltage temperature compensated crystal oscillators.

Abstract translation: 低压差分放大器（10）包括具有差分对（14）和负载（22和24）的电路（12）。 第一负载（22）可以包括第一嵌入式差分放大器（30）和输出晶体管（32），第二负载（24）可以包括第二嵌入式差分放大器（36）和输出晶体管（38）。 差分放大器（10）可以提供宽电压可操作的范围。 差分放大器（10）在低压温度补偿晶体振荡器方面特别有用。

公开(公告)号：WO1997006483A1

公开(公告)日：1997-02-20

申请号：PCT/US1996007414

申请日：1996-05-21

Applicant: MOTOROLA INC.

Inventor： MOTOROLA INC. ,  CONNELL, Lawrence, E. ,  BERGSTEDT, Steven, W.

IPC: G06F07/00

CPC classification number: G06K9/0051 ,  G06F17/18 ,  H03H17/0263

Abstract: A fast and efficient median search method and filter searches a dynamically changing time-ordered list of data samples for a data sample representing the arithmetic median of the list. Embodiments include a method to reduce the number of memory access operations to 2N and a method to reduce the number of memory access operations to N, where N is the number of data samples searched. The described approach includes providing a circular list of N data samples (200) including an incoming data sample replacing an outgoing data sample, and a median data sample. Then, updating the median data sample dependent on magnitudes of the incoming data sample, the median data sample, and the outgoing data sample (205, 207, 209).

Abstract translation: 快速有效的中值搜索方法和过滤器搜索表示列表的算术中值的数据样本的动态变化的时间序列数据样本列表。 实施例包括将存储器访问操作数减少到2N的方法以及将存储器访问操作数减少到N的方法，其中N是搜索的数据样本的数量。 所描述的方法包括提供N个数据样本（200）的循环列表，其包括取代输出数据样本的输入数据样本和中值数据样本。 然后，根据输入数据样本，中值数据样本和输出数据样本（205,207,209）的幅度更新中值数据样本。

公开(公告)号：WO1996017433A1

公开(公告)日：1996-06-06

申请号：PCT/US1995011375

申请日：1995-09-08

Applicant: MOTOROLA INC.

Inventor： MOTOROLA INC. ,  CONNELL, Lawrence, E. ,  COLLINS, Timothy, J. ,  KELLER, Anthony, F. ,  MARVIN, Dennis, F. ,  BUSHMAN, Michael, L.

IPC: H03L01/02

CPC classification number: H03L1/023

Abstract: A low power temperature compensated crystal oscillator (10) is disclosed. The temperature compensated crystal oscillator (10) has a crystal oscillator circuit (12), a voltage controlled reactance element (30), a temperature compensation network (50), and a programmable DC-DC converter network (60) having an output (62) connected to the voltage controlled reactance element (30), the temperature compensation network (50) or both. Much of this structure is adapted for use in an integrated circuit, and provides the advantage of minimizing power and current consumption.

Abstract translation: 公开了一种低功率补偿晶体振荡器（10）。 温度补偿晶体振荡器（10）具有晶体振荡电路（12），压控电抗元件（30），温度补偿网络（50）和可编程DC-DC转换器网络（60），其具有输出 ）连接到电压控制电抗元件（30），温度补偿网络（50）或两者。 该结构的大部分适用于集成电路，并且提供了最小化功率和电流消耗的优点。

公开(公告)号：WO2003036790A2

公开(公告)日：2003-05-01

申请号：PCT/US2002/031859

申请日：2002-10-04

Applicant: MOTOROLA, INC.

Inventor： CONNELL, Lawrence, E. ,  HOLLENBECK, Neal, W.

IPC: H03F3/04

CPC classification number: H03F1/3205 ,  H03F1/301 ,  H03F3/19 ,  H03F2200/72 ,  H03G1/0023

Abstract: A high-gain wide-band RF amplifier (120) with automatic bias supply regulation. Amplifier (120) includes a pair of field effect transistors (FETs) (102, 104) with common source connection (106) biased by FET (108) connected between common source connection (106) and amplifier signal input RFIN. Bias voltage (V B1 ) is applied to the gate of device (108) and automatic gain control voltage (V AGC ) is applied to the gates of FET pair (102, 104). Automatic bias supply circuit (122) is an active load including resistors (124, 126), capacitor (128) and amplifier (130). Capacitor (128) is connected between the negative input (132) and output (134) of amplifier (130). Load reference voltage VO is provided to the positive input. Resistor (124) is connected between output (134) of amplifier (130) and the amplifier output (136) at the drain of FET (104). Resistor (126) is connected between output (136) at the drain of FET (104) and the negative input (132) to amplifier (130) providing amplifier load signal feedback.

Abstract translation: 高增益宽带射频放大器（120），具有自动偏置电源调节功能。 放大器（120）包括一对具有连接在公共源极连接（106）和放大器信号输入RFIN之间的FET（108）偏置的共同源极连接（106）的场效应晶体管（FET）（102,104）。 偏置电压“VB1”被施加到器件（108）的栅极，并且自动增益控制电压“VAGC”被施加到FET对（102,104）的栅极。 自动偏置电源电路（122）是包括电阻器（124,126），电容器（128）和放大器（130）的有源负载。 电容器（128）连接在放大器（130）的负输入端（132）和输出端（134）之间。 将负载参考电压（VO）提供给正输入。 电阻（124）连接在放大器（130）的输出（134）和FET（104）的漏极处的放大器输出（136）之间。 电阻（126）连接在FET（104）的漏极处的输出（136）和负输入端（132）之间，连接到放大器（130），从而提供放大器负载信号反馈。

公开(公告)号：WO1996029777A1

公开(公告)日：1996-09-26

申请号：PCT/US1996001020

申请日：1996-01-23

Applicant: MOTOROLA INC.

Inventor： MOTOROLA INC. ,  CONNELL, Lawrence, E. ,  KELLER, Anthony

IPC: H02M03/18

CPC classification number: H02M3/07

Abstract: What is described is a high efficiency voltage doubler (100). The high efficiency voltage doubler (100) has a charge-pump capacitor (30), an inverter (18), a coupling capacitor (24), a complementary switch pair (16), a DC biasing circuit (102), a charging circuit (106), and an input circuit (108). This structure is adapted for use in an integrated circuit, and provides the advantage of maximizing voltage doubled power output and minimizing current consumption with a minimal number of components.

Abstract translation: 描述的是高效率倍压器（100）。 高效率倍压器（100）具有电荷泵电容器（30），逆变器（18），耦合电容器（24），互补开关对（16），直流偏置电路（102），充电电路 （106）和输入电路（108）。 该结构适用于集成电路，并且具有最大化双倍电压功率输出并且以最小数量的部件最小化电流消耗的优点。

公开(公告)号：EP0741930A1

公开(公告)日：1996-11-13

申请号：EP95933059.0

申请日：1995-09-08

Applicant: MOTOROLA INC.

Inventor： CONNELL, Lawrence, E. ,  COLLINS, Timothy, J. ,  KELLER, Anthony, F. ,  MARVIN, Dennis, F. ,  BUSHMAN, Michael, L.

IPC: H03L1 ,  H03B5

CPC classification number: H03L1/023

Abstract: A low power temperature compensated crystal oscillator (10) is disclosed. The temperature compensated crystal oscillator (10) has a crystal oscillator circuit (12), a voltage controlled reactance element (30), a temperature compensation network (50), and a programmable DC-DC converter network (60) having an output (62) connected to the voltage controlled reactance element (30), the temperature compensation network (50) or both. Much of this structure is adapted for use in an integrated circuit, and provides the advantage of minimizing power and current consumption.

公开(公告)号：WO1995013588A1

公开(公告)日：1995-05-18

申请号：PCT/US1994011767

申请日：1994-10-17

Applicant: MOTOROLA, INC.

Inventor： MOTOROLA, INC. ,  CONNELL, Lawrence, E. ,  RUEGER, Timothy, T.

IPC: G06G07/12

CPC classification number: H03F3/72 ,  H03F1/32

Abstract: A circuit and method provides a low distortion buffer by using a resistive divider stage (18, 20) and a gain stage (12) whose gain is equal to the inverse of the attenuation ratio of the resistive divider to provide unity gain. Multiple inputs (14, 42, 44, ... 46) to the buffer circuit are accommodated by means of an input switching network (30, 38). The gain error introduced by the resistance of the switching network (30, 38) is canceled by placing an equivalent network (60) in a feedback path of the gain stage. The preferred circuit topology is well-suited to low-voltage applications and provides a low-distortion output. Means of reducing power consumption (68, 70) and minimizing undesirable transients (72) are also provided.

Abstract translation: 电路和方法通过使用电阻分压器级（18,20）和增益级（12）提供低失真缓冲器，其增益等于电阻分压器的衰减比的倒数，以提供单位增益。 通过输入交换网络（30,38）容纳到缓冲电路的多个输入（14,42,44，... 46）。 通过将等效网络（60）放置在增益级的反馈路径中来消除由开关网络（30,38）的电阻引入的增益误差。 优选的电路拓扑结构非常适用于低电压应用，并提供低失真输出。 还提供了降低功耗（68,70）和最小化不期望的瞬变（72）的手段。

公开(公告)号：WO1994006206A1

公开(公告)日：1994-03-17

申请号：PCT/US1993006583

申请日：1993-07-13

Applicant: MOTOROLA INC.

Inventor： MOTOROLA INC. ,  REESER, Glen, O. ,  CONNELL, Lawrence, E.

IPC: H03F03/18

CPC classification number: H03F3/3001 ,  H03F1/3211 ,  H03F3/3016

Abstract: A buffer (200) having output devices (101 and 102) exhibiting complementary symmetry and configured as voltage-followers in push pull is biased for class AB operation by a bias network including two substantially equal resistors (201 and 202) arranged and configured to substantially reduce noise attributable to the bias circuit.

Abstract translation: 具有显示互补对称性并被配置为推挽电压跟随器的输出装置（101和102）的缓冲器（200）被偏压用于AB类操作，该偏置网络包括两个基本相等的电阻器（201和202） 降低归因于偏置电路的噪声。

公开(公告)号：EP0784816A1

公开(公告)日：1997-07-23

申请号：EP96920374.0

申请日：1996-05-21

Applicant: MOTOROLA INC.

Inventor： CONNELL, Lawrence, E. ,  BERGSTEDT, Steven, W.

IPC: G06F17 ,  H03H17

CPC classification number: G06K9/0051 ,  G06F17/18 ,  H03H17/0263

Abstract: A fast and efficient median search method and filter searches a dynamically changing time-ordered list of data samples for a data sample representing the arithmetic median of the list. Embodiments include a method to reduce the number of memory access operations to 2N and a method to reduce the number of memory access operations to N, where N is the number of data samples searched. The described approach includes providing a circular list of N data samples (200) including an incoming data sample replacing an outgoing data sample, and a median data sample. Then, updating the median data sample dependent on magnitudes of the incoming data sample, the median data sample, and the outgoing data sample (205, 207, 209).