公开(公告)号：WO1994006137A1

公开(公告)日：1994-03-17

申请号：PCT/US1993008149

申请日：1993-08-30

Applicant: MOTOROLA, INC.

Inventor： MOTOROLA, INC. ,  DAVIS, James, L. ,  ARLEDGE, John, K. ,  SWIRBEL, Thomas, J. ,  WILLIAMS, Melanie

IPC: H01G09/00

CPC classification number: H01M4/60 ,  H01M10/36

Abstract: A rechargeable electrical energy storage device (20). The cell has two electrodes (28, 36) constructed from a similar organometallic compound (30), and the electrodes are electrically connected by an ion carrying electrolyte (32). The electrodes are also physically separated from each other by a barrier (34) that will pass ions but not electrons. In one embodiment of the invention, the electrodes are ferrocene, and the electrolyte is sulfuric acid.

Abstract translation: 一种可充电电能存储装置（20）。 电池具有由类似的有机金属化合物（30）构成的两个电极（28,36），并且电极通过离子载体电解质（32）电连接。 电极也通过将通过离子而不是电子的屏障（34）在物理上彼此分离。 在本发明的一个实施方案中，电极是二茂铁，电解质是硫酸。

公开(公告)号：EP0667032A1

公开(公告)日：1995-08-16

申请号：EP93921248.0

申请日：1993-08-30

Applicant: MOTOROLA, INC.

Inventor： DAVIS, James, L. ,  ARLEDGE, John, K. ,  SWIRBEL, Thomas, J. ,  WILLIAMS, Melanie

IPC: H01G9 ,  H01M4 ,  H01M10

CPC classification number: H01M4/60 ,  H01M10/36

Abstract: A rechargeable electrical energy storage device (20). The cell has two electrodes (28, 36) constructed from a similar organometallic compound (30), and the electrodes are electrically connected by an ion carrying electrolyte (32). The electrodes are also physically separated from each other by a barrier (34) that will pass ions but not electrons. In one embodiment of the invention, the electrodes are ferrocene, and the electrolyte is sulfuric acid.

公开(公告)号：WO1998016022A1

公开(公告)日：1998-04-16

申请号：PCT/US1997017063

申请日：1997-09-24

Applicant: MOTOROLA INC.

Inventor： MOTOROLA INC. ,  NEWTON, Mark, D. ,  PRATT, Steven, D. ,  MUTHUSWAMY, Sivakumar ,  WILLIAMS, Kimberly, A. ,  SWIRBEL, Thomas, J. ,  DAVIS, James, Lynn ,  MARTIN, Lara, J. ,  MULLIGAN, Robert, J. ,  PIEPER, Kevin, J. ,  LEE, Brian, H. ,  CALLANAN, Roger, K.

IPC: H04B01/38

CPC classification number: H04M1/0202 ,  H04B1/3827 ,  H04M1/18

Abstract: A communication device is designed to contain the lowest possible level of toxic or hazardous materials, so that when it is eventually disposed of, it will not harm the environment and can be safely recycled. Each component A1, A2, ..., An in the communication device has a calculated Component Toxicity Index value. A Product Toxicity Index for the entire communication device is calculated by summing the individual Component Toxicity Index values. The desired outcome is a communication device having a Product Toxicity Index less than or equal to 100. The resulting communication device is referred to as "environmentally friendly". The communication device may be a two-way radio (10), and some of the components are a radio transmitter (12), a radio receiver (14), an antenna (16), an amplifier (18), a battery (20) and a housing (22).

Abstract translation: 通信设备被设计为包含最低级别的有毒或有害物质，以便在最终被处理时，不会对环境造成伤害并可以安全回收。 通信设备中的每个组件A1，A2，...，An具有计算出的组分毒性指数值。 通过对各个组分毒性指数值进行求和来计算整个通信设备的产品毒性指数。 期望的结果是具有小于或等于100的产品毒性指数的通信设备。所得到的通信设备被称为“环境友好”。 通信设备可以是双向无线电（10），并且其中的一些组件是无线电发射机（12），无线电接收机（14），天线（16），放大器（18），电池（20） ）和壳体（22）。

公开(公告)号：WO1995028822A1

公开(公告)日：1995-10-26

申请号：PCT/US1995005052

申请日：1995-04-18

Applicant: MOTOROLA INC.

Inventor： MOTOROLA INC. ,  ISERN-FLECHA, Ileana ,  SWIRBEL, Thomas, J. ,  PENNISI, Robert, W. ,  ROSS, Danny, E. ,  ALARCON, Angelita

IPC: H05K09/00

CPC classification number: H05K9/0039 ,  H05K3/284 ,  H05K2201/0715

Abstract: A conformal shield (10) includes a conformal shield base (15), and a conductive layer (16). The conformal shield base (10) has a first conformable insulating material (12) having a characteristic softening point at a first temperature. A second conformable insulating material (14), which has a characteristic softening point at a temperature higher than the first temperature, is overlaid on the first conformable insulating material (12). The conductive layer (16) is disposed on the conformal shield base (15) to form the shield (10).

Abstract translation: 保形罩（10）包括保形屏蔽基座（15）和导电层（16）。 共形屏蔽基底（10）具有在第一温度下具有特征软化点的第一适形绝缘材料（12）。 在第一适形绝缘材料（12）上重叠具有高于第一温度的特征软化点的第二适形绝缘材料（14）。 导电层（16）设置在保形罩（15）上以形成屏蔽（10）。

公开(公告)号：WO2008060646A2

公开(公告)日：2008-05-22

申请号：PCT/US2007/064630

申请日：2007-03-22

Applicant: MOTOROLA, INC. ,  SWIRBEL, Thomas, J.

Inventor： SWIRBEL, Thomas, J.

IPC: H01L47/02 ,  H01L29/06

CPC classification number: H01L29/0665 ,  B82Y10/00 ,  H01L21/76874 ,  H01L24/11 ,  H01L24/13 ,  H01L29/0673 ,  H01L2221/1094 ,  H01L2224/0401 ,  H01L2224/05555 ,  H01L2224/114 ,  H01L2224/11464 ,  H01L2224/116 ,  H01L2224/1308 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2224/13169 ,  H01L2224/13099 ,  H01L2924/00

Abstract: An integrated circuit having carbon nanotube interconnects contains input/output pads situated on the upper surface, the pads arranged in an array having at least two rows. Carbon nanotubes are disposed on the input/output pads to provide electrical and thermal interconnection of the integrated circuit chip to another circuit such as a printed circuit board. The carbon nanotubes can be plated with one or more overlayers of metal.

Abstract translation: 具有碳纳米管互连的集成电路包含位于上表面上的输入/输出焊盘，所述焊盘布置成具有至少两排的阵列。 碳纳米管设置在输入/输出焊盘上以提供集成电路芯片与另一电路（例如印刷电路板）的电和热互连。 碳纳米管可以镀上一层或多层金属覆盖层。

公开(公告)号：WO1993007306A1

公开(公告)日：1993-04-15

申请号：PCT/US1992008330

申请日：1992-09-30

Applicant: MOTOROLA, INC.

Inventor： MOTOROLA, INC. ,  ARLEDGE, John, K. ,  SWIRBEL, Thomas, J. ,  DAVIS, James, L.

IPC: C23C14/34

CPC classification number: C04B41/009 ,  C04B41/52 ,  C04B41/89 ,  C23C14/022 ,  C23C14/18 ,  C23C26/00 ,  H05K3/388 ,  Y10T428/265 ,  C04B41/4515 ,  C04B41/455 ,  C04B41/5033 ,  C04B41/51 ,  C04B35/581

Abstract: A method of metallizing a substrate by vacuum depositing a thin layer of chromium. The substrate is first cleaned (16) by exposing it to a plasma gas discharge. A thin layer of chromium metal is then sputtered under vacuum (17) onto the substrate. The substrate is then heated in an oxygen containing atmosphere (18) for a period of time and at a temperature sufficient to convert the chromium metal to chromium oxide. A second layer of chromium metal is then sputtered (20) onto the chromium oxide layer in order to form an adherent metal system to the substrate.

公开(公告)号：WO2008121500A1

公开(公告)日：2008-10-09

申请号：PCT/US2008/056460

申请日：2008-03-11

Applicant: MOTOROLA, INC. ,  SWIRBEL, Thomas, J.

Inventor： SWIRBEL, Thomas, J.

IPC: H01L21/68 ,  H01L21/60 ,  H01L23/31 ,  H01L21/56

CPC classification number: H01L21/6835 ,  H01L21/568 ,  H01L23/3135 ,  H01L23/525 ,  H01L24/24 ,  H01L24/48 ,  H01L24/82 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/24227 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method for fabricating a low cost integrated circuit package (500) includes separating a processed silicon wafer into a plurality of individual die (501) and then positioning the die on a secondary substrate in a face down position for allowing an increased die I/O connection area. The die is covered with one or more epoxy materials (504) to form a group of embedded die packages. The group of embedded packages is removed from the secondary substrate and the topside of the group of embedded die packages is covered by a further epoxy (502). One or more pads on the die are then exposed and subsequently connected to an I/O connection (506) in a die I/O connection area. Each of the die are then separated forming singular embedded die packages (500) from the secondary substrate. The method provides a manufacturing process, to form a low cost, very high density integrated circuit package using a combination of both wafer scale packaging and wafer level packaging processes.

Abstract translation: 一种用于制造低成本集成电路封装（500）的方法，包括将经处理的硅晶片分离成多个单独的裸片（501），然后将裸片放置在二次基板上，使其面朝下放置，以允许增加的裸片I / O 连接区域。 模具被一种或多种环氧树脂材料覆盖（504）以形成一组嵌入的模具包装。 嵌入式封装的组从第二衬底移除，并且嵌入式封装组的顶部被另外的环氧树脂覆盖（502）。 然后裸片上的一个或多个焊盘露出并随后连接到管芯I / O连接区域中的I / O连接（506）。 然后分离每个管芯，从二次衬底形成单个嵌入式管芯封装（500）。 该方法提供了一种使用晶片级封装和晶片级封装工艺的组合形成低成本，高密度集成电路封装的制造工艺。

公开(公告)号：WO1996003275A1

公开(公告)日：1996-02-08

申请号：PCT/US1995008934

申请日：1995-07-17

Applicant: MOTOROLA INC.

Inventor： MOTOROLA INC. ,  SWIRBEL, Thomas, J. ,  BARNES, Reginald, L.

IPC: B32B03/00

CPC classification number: G02F1/13452 ,  C23C14/086 ,  G02F2001/133334 ,  Y10S428/901 ,  Y10T428/12493 ,  Y10T428/1266 ,  Y10T428/12681 ,  Y10T428/12715 ,  Y10T428/24917 ,  Y10T428/24926

Abstract: A substrate having an optically transparent EMI/RFI shield (30). A transparent substrate has a thin film metallization pattern (20) on one surface, and some of the pattern (20) is covered with an optically transparent EMI/RFI shield (30). The shield (30) comprises a vapor deposited layer of indium-tin oxide on the substrate surface and on the metallization pattern (20). The indium-tin oxide is optically transparent. It is patterned to expose one portion (34) of the metallization pattern (20) and to cover a second portion (32) of the metallization pattern (20). The shield (30) is electrically connected to a part of the metallization pattern (20) that is covered (32), thus providing electrical shielding and transparency.

Abstract translation: 具有光学透明EMI / RFI屏蔽（30）的基板。 透明衬底在一个表面上具有薄膜金属化图案（20），并且一些图案（20）被光学透明的EMI / RFI屏蔽（30）覆盖。 屏蔽（30）包括在衬底表面上和金属化图案（20）上的氧化铟锡的气相沉积层。 铟锡氧化物是光学透明的。 图案化以暴露金属化图案（20）的一部分（34）并覆盖金属化图案（20）的第二部分（32）。 屏蔽（30）电连接到被覆盖（32）的金属化图案（20）的一部分，从而提供电屏蔽和透明度。