公开(公告)号：US10090177B1

公开(公告)日：2018-10-02

申请号：US15687015

申请日：2017-08-25

Applicant: Micron Technology, Inc.

Inventor： Jeremy E. Minnich ,  Benjamin L. McClain ,  Travis M. Jensen

IPC: H01L21/67 ,  H01L21/683 ,  H05K13/00 ,  H05K13/04

Abstract: Systems and methods for releasing semiconductor dies during pick and place operations are disclosed. In one embodiment, a system for handling semiconductor dies comprises a support member positioned to carry at least one semiconductor die releasably attached to a support substrate. The system further includes a picking device having a pick head coupleable to a vacuum source and positioned to releasably attach to the semiconductor die at a pick station. The system still further includes a cooling member coupleable to a cold fluid source and configured to direct a cold fluid supplied by the cold fluid source toward the support substrate at the pick station. The cold fluid cools a die attach region of the substrate where the semiconductor die is attached to the substrate to facilitate removal of the semiconductor die.

公开(公告)号：US12230608B2

公开(公告)日：2025-02-18

申请号：US17478284

申请日：2021-09-17

Applicant: Micron Technology, Inc.

Inventor： Travis M. Jensen ,  Raj K. Bansal

IPC: H01L25/065 ,  H01L21/56 ,  H01L23/00 ,  H01L25/00

Abstract: A semiconductor device has first and second dies forming a die stack. Molding material encapsulates the die stack and forms an upper molded surface of the die stack. First conductive traces are coupled to the first die and extend from between the first and second die to corresponding first via locations in the molding material beyond a first side edge of the die stack. Second conductive traces coupled to an active surface of the second die opposite the first die extend to corresponding second via locations. Each first via location is vertically aligned with one of the second via locations. Through mold vias extend through the molding material between vertically aligned via locations to contact with corresponding conductive traces of the first and second dies, while the molding material that extends between the first conductive traces and the upper molded surface is free from any TMV.

公开(公告)号：US20240055411A1

公开(公告)日：2024-02-15

申请号：US18486950

申请日：2023-10-13

Applicant: Micron Technology, Inc.

Inventor： Travis M. Jensen ,  David R. Hembree

IPC: H01L25/065 ,  H01L25/00

CPC classification number: H01L25/0657 ,  H01L25/50 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06586

Abstract: Semiconductor devices having redistribution structures, and associated systems and methods, are disclosed herein. In one embodiment, a semiconductor package includes a first semiconductor die including a first redistribution structure and a second semiconductor die including a second redistribution structure. The first and second semiconductor dies can be mounted on a package substrate such that the first and second redistribution structures are aligned with each other. In some embodiments, an interconnect structure can be positioned between the first and second semiconductor dies to electrically couple the first and second redistribution structures to each other. The first and second redistribution structures can be configured such that signal routing between the first and second semiconductor dies can be altered based on the location of the interconnect structure.

公开(公告)号：US11233024B2

公开(公告)日：2022-01-25

申请号：US16855730

申请日：2020-04-22

Applicant: Micron Technology, Inc.

Inventor： Travis M. Jensen

IPC: H01L23/00

Abstract: An apparatus comprising a substrate having conductive traces and associated integral terminal pads on a surface thereof, the terminal pads having an irregular surface topography formed in a thickness of a single material of the conductive traces and integral terminal pads. Solder balls may be bonded to the terminal pads, and one or more microelectronic components operably coupled to conductive traces of the substrate on a side thereof opposite the terminal pads. Methods of fabricating terminal pads on a substrate, and electronic systems including substrates having such terminal pads are also disclosed.

公开(公告)号：US20240074055A1

公开(公告)日：2024-02-29

申请号：US17899477

申请日：2022-08-30

Applicant: Micron Technology, Inc.

Inventor： Walter L. Moden ,  Stephen F. Moxham ,  Travis M. Jensen

IPC: H05K1/11 ,  H01L21/48 ,  H01L23/48 ,  H01L23/498 ,  H05K3/00 ,  H05K3/40

CPC classification number: H05K1/116 ,  H01L21/4846 ,  H01L23/481 ,  H01L23/49827 ,  H01L23/49838 ,  H05K3/0014 ,  H05K3/0047 ,  H05K3/4038 ,  H01L24/16 ,  H05K2201/09563 ,  H05K2201/09636

Abstract: Substrates with continuous slot vias are disclosed herein. In one embodiment, a substrate comprises a first design layer, a second design layer, and an intermediary layer between the first and second design layers. The substrate further includes first and second signaling vias extending vertically through the intermediary layer between the first and second design layers. The first and second signaling vias route first and second data signals, respectively, between the first and second design layers. The substrate further includes a slot via that is positioned between the first and second signaling vias within the intermediary layer and extends laterally within the intermediary layer along a path that passes between the first signaling via and the second signaling via. The slot via can have a continuous shape such that the slot via shields the first and second data signals on the first and second signaling vias from crosstalk with one another.

公开(公告)号：US20230055425A1

公开(公告)日：2023-02-23

申请号：US17478284

申请日：2021-09-17

Applicant: Micron Technology, Inc.

Inventor： Travis M. Jensen ,  Raj K. Bansal

IPC: H01L25/065 ,  H01L23/00 ,  H01L25/00 ,  H01L21/56

Abstract: A semiconductor device has first and second dies forming a die stack. Molding material encapsulates the die stack and forms an upper molded surface of the die stack. First conductive traces are coupled to the first die and extend from between the first and second die to corresponding first via locations in the molding material beyond a first side edge of the die stack. Second conductive traces coupled to an active surface of the second die opposite the first die extend to corresponding second via locations. Each first via location is vertically aligned with one of the second via locations. Through mold vias extend through the molding material between vertically aligned via locations to contact with corresponding conductive traces of the first and second dies, while the molding material that extends between the first conductive traces and the upper molded surface is free from any TMV.

公开(公告)号：US11171121B2

公开(公告)日：2021-11-09

申请号：US16836283

申请日：2020-03-31

Applicant: Micron Technology, Inc.

Inventor： Travis M. Jensen ,  David R. Hembree

IPC: H01L25/065 ,  H01L25/00

Abstract: Semiconductor devices having redistribution structures, and associated systems and methods, are disclosed herein. In one embodiment, a semiconductor package includes a first semiconductor die including a first redistribution structure and a second semiconductor die including a second redistribution structure. The first and second semiconductor dies can be mounted on a package substrate such that the first and second redistribution structures are aligned with each other. In some embodiments, an interconnect structure can be positioned between the first and second semiconductor dies to electrically couple the first and second redistribution structures to each other. The first and second redistribution structures can be configured such that signal routing between the first and second semiconductor dies can be altered based on the location of the interconnect structure.

公开(公告)号：US20190326142A1

公开(公告)日：2019-10-24

申请号：US16460956

申请日：2019-07-02

Applicant: Micron Technology, Inc.

Inventor： Jeremy E. Minnich ,  Benjamin L. McClain ,  Travis M. Jensen

IPC: H01L21/67 ,  B28D5/00 ,  H05K13/00 ,  H01L21/683

Abstract: Systems and methods for releasing semiconductor dies during pick and place operations are disclosed. In one embodiment, a system for handling semiconductor dies comprises a support member positioned to carry at least one semiconductor die releasably attached to a support substrate. The system further includes a picking device having a pick head coupleable to a vacuum source and positioned to releasably attach to the semiconductor die at a pick station. The system still further includes a cooling member coupleable to a cold fluid source and configured to direct a cold fluid supplied by the cold fluid source toward the support substrate at the pick station. The cold fluid cools a die attach region of the substrate where the semiconductor die is attached to the substrate to facilitate removal of the semiconductor die.

公开(公告)号：US20250046710A1

公开(公告)日：2025-02-06

申请号：US18755055

申请日：2024-06-26

Applicant: Micron Technology Inc.

Inventor： Scott Smith ,  Travis M. Jensen

IPC: H01L23/528 ,  H01L23/00 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065 ,  H10B80/00

Abstract: An assembly includes a first die, and a second die arranged face-to-face with the first die. The first die includes a first pad, a second pad at a vertical elevation of the first pad, and mirror function circuitry configured to swap functionalities of the first pad and the second pad. The second die includes an additional first pad corresponding to the first pad of the first die, and an additional second pad at a vertical elevation of the additional first pad and corresponding to the second pad of the first die. The additional first pad is coupled to the second pad of the first die. The additional second pad is coupled to the first pad of the first die. Additional assemblies and electronic systems are also described.

公开(公告)号：US11967572B2

公开(公告)日：2024-04-23

申请号：US17647323

申请日：2022-01-06

Applicant: Micron Technology, Inc.

Inventor： Travis M. Jensen

IPC: H01L23/00

CPC classification number: H01L24/05 ,  H01L24/03 ,  H01L24/13 ,  H01L2224/03614 ,  H01L2224/0401 ,  H01L2224/05011 ,  H01L2224/13026

Abstract: An apparatus comprising a substrate having conductive traces and associated integral terminal pads on a surface thereof, the terminal pads having an irregular surface topography formed in a thickness of a single material of the conductive traces and integral terminal pads. Solder balls may be bonded to the terminal pads, and one or more microelectronic components operably coupled to conductive traces of the substrate on a side thereof opposite the terminal pads. Methods of fabricating terminal pads on a substrate, and electronic systems including substrates having such terminal pads are also disclosed.