公开(公告)号：WO1980001965A1

公开(公告)日：1980-09-18

申请号：PCT/US1980000251

申请日：1980-03-10

Applicant: NCR CORP

Inventor： NCR CORP ,  LOCKWOOD G

IPC: G11C11/40

CPC classification number: G11C14/00

Abstract: A volatile/non-volatile RAM cell employing a bistable multivibrator with non-volatile, alterable-threshold capacitors (307, 308) coupled to the output terminals (A, B) thereof to provide backup data storage in a power-down situation The non-volatile capacitors each have a non-alterable section (307A, 308A) and an alterable section (307B, 308B), the non-alterable section having either a depletion or an enhancement threshold. The RAM cell incorporates both polysilicon resistors (305, 306) and enhancement mode devices (309, 310) in the load circuits of each cell to produce boot-strapping of the voltage on one of the multivibrator terminals (A, B) during a volatile/non-volatile write operation. A non-inverted restore of digital information to the bistable multivibrator is accomplished by simultaneous application of a step voltage to the cell power line (123A) and a restore pulse to the gate (307C, 308C) of the non-volatile capacitors. An alternative inverted restore for a cell utilizing depletion thresholds in the non-alterable sections (307A, 308A) of the non-volatile capacitors, (307, 308) involves grounding the gate electrode (307C, 308C) of the non-volatile capacitors to restore the previously written information to the multivibrator. A data processing system employing the volatile/non-volatile RAM system with a single five volt power supply (40) and a write/restore/erase signal generator (50), all implemented in five volt, n-channel silicon-insulator-silicon (SIS) device technology, is shown.

Abstract translation: 使用具有耦合到其输出端子（A，B）的非易失性，可变阈值电容器（307,308）的双稳态多谐振荡器的易失性/非易失性RAM单元以在掉电情况下提供备份数据存储非 - 每个易失性电容器具有不可改变的部分（307A，308A）和可变形部分（307B，308B），所述不可更改部分具有耗尽或增强阈值。 RAM单元在每个单元的负载电路中并入多晶硅电阻器（305,306）和增强模式器件（309,310），以在易失性存储器中产生在多谐振荡器端子（A，B）之一上的电压的引导带 /非易失性写操作。 通过向单元电力线（123A）同步施加阶梯电压和向非易失性电容器的栅极（307C，308C）施加恢复脉冲来实现数字信息到双稳态多谐振荡器的非反相恢复。 在非易失性电容器（307,308）的不可改变部分（307A，308A）中使用耗尽阈值的单元的替代反向恢复涉及使非易失性电容器的栅电极（307C，308C）接地到 将先前写入的信息恢复到多谐振荡器。 一种使用具有单个五伏电源（40）的易失性/非易失性RAM系统和写入/恢复/擦除信号发生器（50）的数据处理系统，全部在五伏的n沟道硅绝缘体硅 （SIS）设备技术。

公开(公告)号：WO1981001483A1

公开(公告)日：1981-05-28

申请号：PCT/US1980001518

申请日：1980-11-10

Applicant: NCR CORP

Inventor： NCR CORP ,  LOCKWOOD G ,  DONALDSON D ,  CRAYCRAFT D

IPC: G11C11/40

CPC classification number: G11C14/00

Abstract: A volatile/non-volatile RAM cell (400) employing a bistable multivibrator with non-volatile, alterable-threshold capacitors (407, 408) coupled to the output terminals (A, B) thereof to provide backup data storage in a power-down situation. In one embodiment, the non-volatile capacitors each have a non-alterable section (A) and an alterable section (B), the non-alterable section having either a depletion or an enhancement threshold. The V/NV RAM cell employs a pair of field effect transistors (409, 410) of depletion or enhancement type to couple the non-volatile capacitors to the output terminals. These coupling transistors form with the non-volatile capacitors a pair of nodes (C, D). The coupling transistors are biased such that a write voltage signal applied to the gates of the non-volatile capacitors produces a bootstrapped voltage on one of the pair of nodes which is effectively isolated from the output terminals of the cell.

公开(公告)号：WO1980001972A1

公开(公告)日：1980-09-18

申请号：PCT/US1980000249

申请日：1980-03-10

Applicant: NCR CORP

Inventor： NCR CORP ,  LOCKWOOD G

IPC: H03K05/02

CPC classification number: H02M3/07 ,  G11C5/00 ,  G11C5/145 ,  G11C14/00 ,  G11C16/0466

Abstract: A signal generator (50A) for producing, from a low voltage power supply, relatively large magnitude pulse signals of opposite polarity to a device (10) input terminal having a parallel resistor (11)-capacitor (12) circuit connection to a reference voltage is disclosed. A voltage multiplier (52) powered by the low voltage power supply provides a multiplied voltage output which is stored on a first large capacitor (58). A second large capacitor (59) has one terminal connected to the device (10) input terminal. To produce the large, opposite polarity signals, a control circuit means operates in conjunction with the voltage multiplier (52) and the first capacitor (58) to produce a predetermined sequence of voltages on the second terminal of the second capacitor (59).

Abstract translation: 一种信号发生器（50A），用于从低压电源产生与具有与基准电压相连的并联电阻器（11）电容器（12）的装置（10）输入端极性相反极性的相对较大幅度的脉冲信号 被披露。 由低压电源供电的电压倍增器（52）提供存储在第一大电容器（58）上的倍增电压输出。 第二大电容器（59）具有连接到装置（10）输入端的一个端子。 为了产生大的相反的极性信号，控制电路装置与电压倍增器（52）和第一电容器（58）一起工作，以在第二电容器（59）的第二端子上产生预定的电压序列。

公开(公告)号：WO1980001122A1

公开(公告)日：1980-05-29

申请号：PCT/US1979001025

申请日：1979-11-26

Applicant: NCR CORP

Inventor： NCR CORP ,  EVANS G ,  LOCKWOOD G ,  TRUDEL M

IPC: H01L29/78

CPC classification number: G11C16/0466 ,  H01L29/1045 ,  H01L29/792

Abstract: A low voltage write non-volatile MNOSFET memory device preferably of n-channel type has a first relatively highly doped p+ channel region (27) and a second underlying less highly doped p- region (28). The device is written to a "1" state by applying a low voltage (+12V) to the gate (21) and simultaneously applying a suitable voltage to the source (12) and/or the drain (13) to induce avalanche breakdown in the channel.

Abstract translation: 优选地，n沟道型的低电压写入非易失性MNOSFET存储器件具有第一相对高掺杂的p +沟道区（27）和第二下面较低掺杂的p-区（28）。 通过向栅极（21）施加低电压（+ 12V）并且同时向源极（12）和/或漏极（13）施加合适的电压以将雪崩击穿，将器件写入“1”状态 这个频道。