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公开(公告)号：JP2009065182A
公开(公告)日：2009-03-26
申请号：JP2008264252
申请日：2008-10-10
Applicant: Osram Opto Semiconductors Gmbh , オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツングOsram Opto Semiconductors GmbH
Inventor： EISERT DOMINIK , ILLEK STEFAN , WOLFGANG SCHMIDT
CPC classification number: H01L33/20 , H01L23/3677 , H01L24/29 , H01L24/83 , H01L24/95 , H01L2224/29014 , H01L2224/29124 , H01L2224/29164 , H01L2224/29169 , H01L2224/83203 , H01L2924/12042 , H01L2924/351 , H01L2924/3512 , H01L2924/00
Abstract: PROBLEM TO BE SOLVED: To reduce or compensate thermal stresses in a semiconductor element, which arise as a result of temperature changes during processing and during operation and on account of different expansion coefficients of a semiconductor and a carrier substrate. SOLUTION: In a method of producing the semiconductor element having a light-emitting semiconductor layer or a light-emitting semiconductor element, two contact locations, and a vertically or horizontally patterned carrier substrate, the carrier substrate is patterned in such a way that the thermal stresses are reduced or compensated sufficiently to ensure that the element does not fail. COPYRIGHT: (C)2009,JPO&INPIT
Abstract translation: 要解决的问题：减少或补偿半导体元件中由于处理期间和操作期间的温度变化以及由于半导体和载体衬底的不同膨胀系数引起的热应力。 解决方案：在制造具有发光半导体层或发光半导体元件，两个接触位置以及垂直或水平图案化的载体衬底的半导体元件的方法中，以这种方式图案化载体衬底 热应力被充分降低或补偿，以确保元件不会失效。 版权所有（C）2009，JPO＆INPIT
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2.发明专利Luminescent diode chip to be flip-chip mounted on carrier, and method for production thereof 有权用于在载体上安装的片状芯片的发光二极管芯片及其生产方法
公开(公告)号：JP2010074195A
公开(公告)日：2010-04-02
申请号：JP2009298860
申请日：2009-12-28
Applicant: Osram Opto Semiconductors Gmbh , オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツングOsram Opto Semiconductors GmbH
Inventor： HAERLE VOLKER DR , EISERT DOMINIK
CPC classification number: H01L33/62 , H01L2224/48463 , H01L2924/01068 , H01L2924/12041 , H01L2924/3011 , H01L2924/3025 , H01L2924/00014 , H01L2924/00
Abstract: PROBLEM TO BE SOLVED: To avoid that a parasitic current circuit is generated between solder and a base in flip-chip mounting.
SOLUTION: In a luminescent diode chip for flip-chip mounting on a carrier, an insulating means (40, 42, 44, 46, 48) is provided on the chip, for electrically insulating exposed surfaces of the semiconductor body (14) and the substrate (12) from the carrier (30) in the luminescent diode chip having the conductive substrate (12), the semiconductor body (14), and a contact (18), whereby either a carrier is covered with solder or a layer of solder is applied to the contact.
COPYRIGHT: (C)2010,JPO&INPITAbstract translation: 要解决的问题：为了避免在倒装芯片安装中焊料和基座之间产生寄生电流电路。 解决方案：在用于倒装芯片安装在载体上的发光二极管芯片中，在芯片上设置绝缘装置（40,42,44,46,48），用于电绝缘半导体本体（14）的暴露表面 ）和具有导电基板（12），半导体主体（14）和触点（18）的发光二极管芯片中的载体（30）的基板（12），其中载体被焊料或 将焊料层施加到触点。 版权所有（C）2010，JPO＆INPIT
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3.发明专利
公开(公告)号：JP2011014938A
公开(公告)日：2011-01-20
申请号：JP2010233892
申请日：2010-10-18
Applicant: Osram Opto Semiconductors Gmbh , オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツングOsram Opto Semiconductors GmbH
Inventor： BADER STEFAN , HAHN BERTHOLD , HAERLE VOLKER , LUGAUER HANS-JURGEN , MUNDBROD-VANGEROW MANFRED , EISERT DOMINIK
Abstract: PROBLEM TO BE SOLVED: To provide a light emitting semiconductor element which is enhanced in radiation efficiency, and a method of manufacturing the light emitting semiconductor element.SOLUTION: The light emitting semiconductor element has a first main surface and a second main surface, and a semiconductor base of the semiconductor element is formed by a stack of various group III-V nitride semiconductor layers. At least part of produced radiation is passed through the first main surface to be output and coupled, and a reflector is bonded to the second main surface. A group III-V nitride layer is bonded to a junction substrate having a substrate base and an intermediate layer, and the substrate base has a larger coefficient of thermal expansion than the group III-V nitride layer, which is deposited on the intermediate layer.
Abstract translation: 要解决的问题：提供一种提高辐射效率的发光半导体元件和制造发光半导体元件的方法。解决方案：发光半导体元件具有第一主表面和第二主表面，以及 半导体元件的半导体基底由各种III-V族氮化物半导体层的叠层形成。 产生的辐射的至少一部分通过第一主表面以被输出和耦合，并且反射器被结合到第二主表面。 III-V族氮化物层被结合到具有基底和中间层的接合衬底上，并且衬底基底具有比沉积在中间层上的III-V族氮化物层更大的热膨胀系数。
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4.发明专利
公开(公告)号：JP2010187033A
公开(公告)日：2010-08-26
申请号：JP2010125863
申请日：2010-06-01
Applicant: Osram Opto Semiconductors Gmbh , オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツングOsram Opto Semiconductors GmbH
Inventor： BAUR JOHANNES , EISERT DOMINIK , FEHRER MICHAEL , HAHN BERTHOLD , HAERLE VOLKER DR
CPC classification number: H01L33/20
Abstract: PROBLEM TO BE SOLVED: To provide a radiation-emitting semiconductor component which can be produced from a wafer with a better area yield and is suitable to high optical output, and a method for the production thereof. SOLUTION: The radiation-emitting semiconductor component has a radiation-transmissive substrate, on the underside of which a radiation-generating layer is arranged, in which the substrate has inclined side surfaces, in which the refractive index of the substrate is greater than the refractive index of the radiation-generating layer, in which the difference in refractive index results in an unilluminated substrate region, into which no photons are coupled directly from the radiation-generating layer, and in which the substrate has essentially perpendicular side surfaces in the unilluminated region. COPYRIGHT: (C)2010,JPO&INPIT
Abstract translation: 要解决的问题：提供一种可以从具有更好的面积产率的晶片生产并适用于高光输出的辐射发射半导体组件及其制造方法。 解决方案：辐射发射半导体部件具有辐射透射性基板，其下侧布置有辐射发生层，其中基板具有倾斜侧表面，其中基板的折射率较大 比其中折射率差导致没有光子直接从辐射产生层耦合的未照射衬底区域的辐射产生层的折射率，并且其中衬底具有基本垂直的侧表面 未发光区域。 版权所有（C）2010，JPO＆INPIT
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公开(公告)号：JP2007073998A
公开(公告)日：2007-03-22
申请号：JP2006337515
申请日：2006-12-14
Applicant: Osram Opto Semiconductors Gmbh , オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツングOsram Opto Semiconductors GmbH
Inventor： BAUR JOHANNES , EISERT DOMINIK , FEHRER MICHAEL , HAHN BERTHOLD , HAERLE VOLKER DR , JACOB ULRICH , PLASS WERNER , STRAUS UWE , VOELKL JOHANNES , ZEHNDER ULRICH
CPC classification number: H01L33/20 , H01L33/24 , H01L2224/48091 , H01L2924/00014
Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor chip suitable for high radiation output so that output efficiency of radiation generated in the semiconductor chip is improved.
SOLUTION: At least one vertical surface of a semiconductor chip, which is used as an output surface, is longer than a lateral surface in an extending direction of an active zone.
COPYRIGHT: (C)2007,JPO&INPITAbstract translation: 要解决的问题：提供适合于高辐射输出的半导体芯片，从而提高在半导体芯片中产生的辐射的输出效率。 解决方案：用作输出表面的半导体芯片的至少一个垂直表面比活动区域的延伸方向上的侧表面长。 版权所有（C）2007，JPO＆INPIT
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Patent Agency Ranking6.发明专利Method of manufacturing optical semiconductor device, and optical semiconductor device 有权制造光学半导体器件的方法和光学半导体器件
公开(公告)号：JP2011035433A
公开(公告)日：2011-02-17
申请号：JP2010256649
申请日：2010-11-17
Applicant: Osram Opto Semiconductors Gmbh , オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツングOsram Opto Semiconductors GmbH
Inventor： HAERLE VOLKER , HAHN BERTHOLD , LUGAUER HANS-JURGEN , BOLAY HELMUT , BADER STEFAN , EISERT DOMINIK , STRAUS UWE , VOELKL JOHANNES , ZEHNDER ULRICH , LELL ALFRED , WEIMAR ANDREAS
CPC classification number: H01L33/32 , B82Y20/00 , H01L33/06 , H01S5/3407 , H01S5/3408 , H01S5/34333
Abstract: PROBLEM TO BE SOLVED: To provide a method of manufacturing an optical semiconductor device capable of improving quantum efficiency. SOLUTION: An indium content of at least one well layer is increased in a step of growing the well layer. In the optical semiconductor device, the well layer has a first composition based on a nitride semiconductor material with first electron energy, and a barrier layer has a second composition based on the nitride semiconductor material with second electron energy higher than the first electron energy. A beam activated quantum well layer is grown on the barrier layer. Non-radiative well layers and the barrier layers form a superlattice for the beam activated quantum well layer. The layer thickness of the beam activated quantum well layer is larger than the layer thickness of the well layer of the superlattice. COPYRIGHT: (C)2011,JPO&INPIT
Abstract translation: 要解决的问题：提供一种能够提高量子效率的制造光半导体器件的方法。 解决方案：在生长阱层的步骤中增加至少一个阱层的铟含量。 在光半导体器件中，阱层具有基于具有第一电子能的氮化物半导体材料的第一组成，并且阻挡层具有基于具有高于第一电子能的第二电子能的氮化物半导体材料的第二组成。 光束激发量子阱层生长在阻挡层上。 非辐射阱层和阻挡层形成用于束激活量子阱层的超晶格。 束活化量子阱层的层厚度大于超晶格阱层的层厚度。 版权所有（C）2011，JPO＆INPIT
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公开(公告)号：JP2007073986A
公开(公告)日：2007-03-22
申请号：JP2006301854
申请日：2006-11-07
Applicant: Osram Opto Semiconductors Gmbh , オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツングOsram Opto Semiconductors GmbH
Inventor： BADER STEFAN , EISERT DOMINIK , HAHN BERTHOLD , HAERLE VOLKER DR
CPC classification number: H01L33/405 , H01L27/153 , H01L33/0079 , H01L33/44
Abstract: PROBLEM TO BE SOLVED: To provide a technically simple and an inexpensive method for manufacturing a GaN-based semiconductor device, and to provide a method for manufacturing the semiconductor device which has enhanced luminous efficiency. SOLUTION: A plurality of GaN-based layers (4) are applied onto a laminated substrate which has a substrate body (1) and an interlayer (2). In this case, the thermal expansion coefficient of the substrate body (1) is similar to or greater than that of the GaN-based layers (4), and the GaN-based layers (4) are deposited on the interlayer (2). Preferably, the interlayer and the substrate body are bonded by a wafer bonding process. COPYRIGHT: (C)2007,JPO&INPIT
Abstract translation: 要解决的问题：为了提供一种技术上简单且便宜的GaN基半导体器件的制造方法，并提供一种具有增强的发光效率的半导体器件的制造方法。 解决方案：将多个GaN基层（4）施加到具有基板主体（1）和中间层（2）的层叠基板上。 在这种情况下，基板主体（1）的热膨胀系数与GaN基层（4）的热膨胀系数相似或更大，并且GaN基层（4）沉积在中间层（2）上。 优选地，通过晶片接合工艺来接合中间层和基板主体。 版权所有（C）2007，JPO＆INPIT
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8.发明专利Semiconductor chip for emitting electromagnetic beam and its manufacturing method 有权用于发射电磁波束的半导体芯片及其制造方法
公开(公告)号：JP2004128507A
公开(公告)日：2004-04-22
申请号：JP2003341558
申请日：2003-09-30
Applicant: Osram Opto Semiconductors Gmbh , オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツングOsram Opto Semikonductors GmbH
Inventor： BADER STEFAN , EISERT DOMINIK , HAHN BERTHOLD , KAISER STEPHAN
Abstract: PROBLEM TO BE SOLVED: To improve the efficiency for extracting the light, without incuring so much costs, from a semiconductor chip which includes a semiconductor layer stack 1 having an n-type conductive semiconductor layer 11, a p-type conductive semiconductor layer 13, and an electromagnetic beam producing region 12 between them and manufactured epitaxially; a supporting plate 50; and a mirror layer 40 located between them and to reflect the electromagnetic beam emitted from the semiconductor layer stack in the direction to the supporting plate. SOLUTION: The mirror layer has a plurality of flat reflecting partial surfaces 14 which are positioned to the main elongated surface of the beam producing region diagonally and at angles between 10° and 50° to the main elongated surface respectively. COPYRIGHT: (C)2004,JPO
Abstract translation: 要解决的问题为了提高提取光的效率，不需要花费太多的代价，从包括具有n型导电半导体层11的半导体层堆叠1的半导体芯片，p型导电半导体 层13，以及它们之间的电磁射束产生区域12，外延制造; 支撑板50; 以及位于它们之间的镜面层40，以将从半导体层堆叠发射的电磁波反射到支撑板的方向。 解决方案：镜层具有多个平坦的反射部分表面14，它们分别定位在光束产生区域的主细长表面上，并且分别与主细长表面成10°至50°的角度。 版权所有（C）2004，JPO
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公开(公告)号：JP2003264130A
公开(公告)日：2003-09-19
申请号：JP2002366978
申请日：2002-12-18
Applicant: OSRAM OPTO SEMICONDUCTORS GMBH
Inventor： PLOESSL ANDREAS , HAHN BERTHOLD , EISERT DOMINIK , KAISER STEPHAN
Abstract: PROBLEM TO BE SOLVED: To provide a method of manufacturing an effective layer (2) containing at least a semiconductor layer by separating the effective layer (2) from a carrier (1). SOLUTION: An effective layer (2) is formed on a carrier (1), a subsidiary carrier (3) is formed on the opposite side of the effective layer (2) to the carrier (1) with a bond layer (4), advantageously a bond layer (4) having a metal material at a bonding temperature, and the carrier (1) is mechanically peeled off at a temperature higher or equal to the bonding temperature of the bond layer but lower than the melting temperature whereby at least a part of the effective layer is peeled off, together with the subsidiary carrier layer (3). COPYRIGHT: (C)2003,JPO
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10.发明专利Light-emitting diode chip to be flip - chip - mounted on support body, and method for manufacturing the same 有权发光二极管芯片，以便在支撑体上安装 - 芯片，以及制造它们的方法
公开(公告)号：JP2003303992A
公开(公告)日：2003-10-24
申请号：JP2003091015
申请日：2003-03-28
Inventor： HAERLE VOLKER DR , EISERT DOMINIK
CPC classification number: H01L33/62 , H01L2224/48463 , H01L2924/01068 , H01L2924/12041 , H01L2924/3011 , H01L2924/3025 , H01L2924/00014 , H01L2924/00
Abstract: PROBLEM TO BE SOLVED: To prevent generation of a parasitic current circuit between a solder and a base body at conducting the flip - chip - mounting of a light-emitting diode chip.
SOLUTION: This light-emitting diode chip is provided with a conductive base body (12), a semiconductor body (14), and a contact (18), wherein a support body is covered with solder or a solder layer is formed on contact. At performing of the flip - chip - mounting of the light-emitting diode chip, the exposed faces of the semiconductor body (14) and the base body (12) are electrically insulated from the support body (30) by providing insulating materials (40, 42, 44, 46, and 48) on the chip to perform the flip - chip - mounting of the light-emitting diode chip on the support body.
COPYRIGHT: (C)2004,JPOAbstract translation: 要解决的问题：为了防止在发光二极管芯片的倒装芯片安装时在焊料和基体之间产生寄生电流电路。 解决方案：该发光二极管芯片设置有导电基体（12），半导体本体（14）和触点（18），其中支撑体被焊料覆盖或形成焊料层 联系。 在执行发光二极管芯片的倒装芯片安装时，半导体本体（14）和基体（12）的露出面通过提供绝缘材料（40）与支撑体（30）电绝缘 ，42,44,46和48），以执行将发光二极管芯片安装在支撑体上的倒装芯片。 版权所有（C）2004，JPO
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