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1.
公开(公告)号:WO2019110096A1
公开(公告)日:2019-06-13
申请号:PCT/EP2017/081702
申请日:2017-12-06
Applicant: OSRAM OPTO SEMICONDUCTORS GMBH
Inventor: ITHNAIN, Ismail , OOI, Chee-Eng , LING, Mooi Hiong
IPC: H01L23/495 , H01L23/31 , H01L21/48
Abstract: A lead frame (1) is described, the lead frame comprising a first main surface (11) and a second main surface (12) being located remote from the fist main surface, and having at least one anchoring structure (2) with at least one groove (20) in the first main surface, wherein the at least one groove reaches into the lead frame in a direction tilted to a direction perpendicular to the first main surface, the at least one groove having a first groove wall (21) and a second groove wall (22), wherein the second groove wall and a part of the first main surface adjoining the second groove wall form an overhang (14). Furthermore, a method for manufacturing a lead frame and a semiconductor device with a lead frame are described.
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公开(公告)号:WO2020007463A1
公开(公告)日:2020-01-09
申请号:PCT/EP2018/068137
申请日:2018-07-04
Applicant: OSRAM OPTO SEMICONDUCTORS GMBH
Inventor: LAM, Melissa , LIU, Tomin , ONG, Chin Hin , ZAINORDIN, Mohd Fauzi , ITHNAIN, Ismail
IPC: H01L33/00 , H01L33/50 , H01L33/56 , H01L25/075 , H01L33/62
Abstract: In at least one embodiment, the luminescence conversion element (2) is designed for an optoelectronic semiconductor chip (3) in order to adjust the luminescence conversion element (2) to said optoelectronic semiconductor chip (3). The luminescence conversion element (2) comprises a cover (21) and a ledge (22). At least the cover (21) contains a phosphor. The ledge (22) protrudes from an edge of the cover (21) in a direction away from a light exit side (20) of the cover (21) on sufficient lateral sides of the cover (21) so that a displacement of the luminescence conversion element (2) in the direction left/right and also bottom/top is avoided.
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公开(公告)号:WO2019048061A1
公开(公告)日:2019-03-14
申请号:PCT/EP2017/072692
申请日:2017-09-11
Applicant: OSRAM OPTO SEMICONDUCTORS GMBH
Inventor: OOI, Chee Eng , ITHNAIN, Ismail , LIM, Choo Kean , CHAN, Weng Heng
CPC classification number: H01L33/62 , H01L33/486 , H01L2933/0066
Abstract: The invention relates to a carrier for an optoelectronic semi-conductor chip, comprising a flat top side, a flat underside and a first side surface. The carrier comprises a first lead frame section,which ranges from the top side to the underside of the carrier, embedded within an insulating material. The first lead frame section comprises a first tie bar, extending to the first side surface. At the first side surface, the insulating material is arranged between the top side of the carrier and the first tie bar as well as between the under-side of the carrier and the first tie bar.
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公开(公告)号:WO2017114564A1
公开(公告)日:2017-07-06
申请号:PCT/EP2015/081355
申请日:2015-12-29
Applicant: OSRAM OPTO SEMICONDUCTORS GMBH
Inventor: ITHNAIN, Ismail , LIM, Choo Kean , CHAN, Weng Heng
IPC: H01L21/48
CPC classification number: H01L21/4828
Abstract: A method of etching a metal lead frame for a semiconductor chip includes the application of an etching agent to a metal plate using a first and a second spray nozzle, which are located on opposite sides of the metal plate. The volumetric flow rate of the etching agent applied to the metal plate via the first spray nozzle is at least 10 % different from the volumetric flow rate of the etching agent applied to the metal plate via the second spray nozzle. A metal plate with an etching trench extending from a first side of the metal plate to a second side of the metal plate is disclosed. The etching trench comprises a first section and a second section, wherein a first side wall and a second side wall of the etching trench are basically perpendicular to the first side of the metal plate in the first section. A third side wall and a fourth side wall limit the etching trench within the second section. The first section of the etching trench extends from the first side of the metal plate to approximately one third of the thickness of the metal plate and the second section extends from the second side of the metal plate to approximately two thirds of the thickness of the metal plate. The first side of the metal plate adjoins the first side wall, which adjoins the third side wall, which adjoins the second side of the metal plate. The first side of the metal plate adjoins the second side wall, which adjoins the fourth side wall, which adjoins the second side of the metal plate. The third and fourth side wall are inclined compared to the first and second side wall in a way that the distance between the first and the second side wall is smaller than the distance between the third and the fourth side wall.
Abstract translation: 蚀刻用于半导体芯片的金属引线框架的方法包括使用第一和第二喷嘴将蚀刻剂施加到金属板,所述第一和第二喷嘴位于金属板的相对侧上 。 通过第一喷嘴施加到金属板上的蚀刻剂的体积流量与通过第二喷嘴施加到金属板上的蚀刻剂的体积流量不同至少10%。 公开了一种具有从金属板的第一侧延伸到金属板的第二侧的蚀刻沟槽的金属板。 蚀刻沟槽包括第一部分和第二部分,其中蚀刻沟槽的第一侧壁和第二侧壁基本垂直于第一部分中的金属板的第一侧。 第三侧壁和第四侧壁将蚀刻沟槽限制在第二部分内。 蚀刻槽的第一部分从金属板的第一侧延伸到金属板厚度的约三分之一,并且第二部分从金属板的第二侧延伸到金属厚度的约三分之二 盘子。 金属板的第一侧邻接第一侧壁,第一侧壁邻接第三侧壁,邻接金属板的第二侧。 金属板的第一侧邻接与第四侧壁邻接的第二侧壁,第二侧壁邻接金属板的第二侧。 与第一和第二侧壁相比,第三和第四侧壁以第一和第二侧壁之间的距离小于第三和第四侧壁之间的距离的方式倾斜。 p>
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5.
公开(公告)号:WO2021037371A1
公开(公告)日:2021-03-04
申请号:PCT/EP2019/073151
申请日:2019-08-29
Applicant: OSRAM OPTO SEMICONDUCTORS GMBH
Inventor: MANSOR, Mazwan , ITHNAIN, Ismail , ZAINORDIN, Mohd Fauzi
IPC: H01L25/16
Abstract: An optoelectronic device (50) comprises a semiconductor chip (30), a first redistribution layer (25) arranged over the semiconductor chip (30), and at least one light emitter (11) and at least one light detector (12) arranged over the first redistribution layer (25), wherein the first redistribution layer (25) electrically couples the semiconductor chip (30) to the at least one light emitter (11) and the at least one light detector (12).
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公开(公告)号:WO2018015457A1
公开(公告)日:2018-01-25
申请号:PCT/EP2017/068275
申请日:2017-07-19
Applicant: OSRAM OPTO SEMICONDUCTORS GMBH
Inventor: CHOOI, Kah Mun , KHOO, Lay Sin , ITHNAIN, Ismail
Abstract: The Scope of the invention is a metal lead frame for an opto-electronic device comprising three metal layers, wherein a first metal layer comprises copper, wherein a second metal layer adjacent to the first metal layer comprises nickel and wherein a third metal layer adjacent to the second metal layer comprises silver, characterized in that the second metal layer comprises a polycrystalline structure of nickel with a distribution of grain sizes around a mean grain size, and in that the mean grain size is above 100 nanometres.
Abstract translation: 本发明的范围是用于包括三个金属层的光电子器件的金属引线框架,其中第一金属层包括铜,其中与第一金属层相邻的第二金属层包括镍 并且其中与所述第二金属层相邻的第三金属层包含银,其特征在于所述第二金属层包含镍的多晶结构,所述镍的多晶结构具有围绕平均晶粒尺寸的晶粒尺寸分布,并且其中所述平均晶粒尺寸大于100 纳米。 p>
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公开(公告)号:WO2017133758A1
公开(公告)日:2017-08-10
申请号:PCT/EP2016/052180
申请日:2016-02-02
Applicant: OSRAM OPTO SEMICONDUCTORS GMBH
Inventor: ITHNAIN, Ismail , LIM, Choo Kean , CHAN, Weng Heng
IPC: H01L33/62 , H01L23/495 , C25D3/12 , C25D5/14 , C25D5/18
CPC classification number: H01L33/62 , C25D3/12 , C25D5/14 , C25D5/18 , H01L23/49582 , H01L2224/48464 , H01L2933/0066
Abstract: A metal lead frame (100) for an optoelectronic device (150) comprising three metal layers is disclosed. A first metal layer (110) comprises copper, a second metal layer (120) adjacent to the first metal layer comprises nickel and a third metal layer (130) adjacent to the second metal layer comprises silver. The second metal layer (120) comprises a first and a second sublayer (121, 122), which are adjoining and polycrystalline with a mean grain size each. The mean grain size of the first sublayer (121) differs more than 30 % from the mean grain size of the second sublayer (122). Moreover, an electronic device comprises such a lead frame. Additionally, a production method of such a lead frame is disclosed, comprising the steps: - Providing a copper lead frame; - galvanic deposition of nickel onto the copper lead frame; and - deposition of silver onto the nickel coated lead frame. The galvanic deposition of nickel is split into a first and a second process step with different deposition conditions, thus generating a first and a second polycrystalline sublayer. The mean grain size of the first sublayer differs more than 30 % from the mean grain size of the second sublayer.
Abstract translation: 公开了一种用于包括三个金属层的光电子器件(150)的金属引线框架(100)。 第一金属层(110)包含铜,与第一金属层相邻的第二金属层(120)包含镍,并且与第二金属层相邻的第三金属层(130)包含银。 第二金属层(120)包括第一和第二子层(121,122),它们是相邻的并且是平均晶粒尺寸的多晶。 第一子层(121)的平均晶粒尺寸与第二子层(122)的平均晶粒尺寸相差超过30%。 而且,电子设备包括这种引线框架。 另外,公开了这种引线框架的制造方法,其包括以下步骤: - 提供铜引线框架; - 在铜引线框架上电镀镍沉积; 和 - 在镀镍引线框架上沉积银。 镍的电沉积被分成具有不同沉积条件的第一和第二工艺步骤,从而产生第一和第二多晶子层。 第一个子层的平均晶粒尺寸与第二个子层的平均晶粒尺寸相差超过30%。 p>
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8.
公开(公告)号:EP4022676A1
公开(公告)日:2022-07-06
申请号:EP19766196.0
申请日:2019-08-29
Applicant: OSRAM Opto Semiconductors GmbH
Inventor: MANSOR, Mazwan , ITHNAIN, Ismail , ZAINORDIN, Mohd Fauzi
IPC: H01L25/16
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