公开(公告)号：AU2015312023A1

公开(公告)日：2017-02-23

申请号：AU2015312023

申请日：2015-09-02

Applicant: QUALCOMM INC

Inventor： AMARILIO LIOR ,  BALATSOS ARIS

IPC: G06F13/42 ,  G06F13/28

Abstract: Multi-channel audio communication in a Serial Low-power Inter-chip Media Bus (SLIMbus) system (300) is disclosed. A multi-channel output port (302(X)) is provided in a SLIMbus system. The multi-channel output port receives an audio stream from an audio source (e.g., a storage medium) via a direct memory access (DMA) pipe (308) and distributes the audio stream to multiple receiving ports (234,238) (e.g., speakers) over multiple data channels (316L,318R), all connected to the single multi-channel output port. A multi-channel input port is also provided in the SLIMbus system. The multi-channel input port connects to multiple data channels from multiple distributing ports (e.g., microphones). It is thereby possible to support multiple data channels with a single DMA pipe, thus improving implementation flexibilities and efficiencies of the SLIMbus system.

公开(公告)号：ES2706307T3

公开(公告)日：2019-03-28

申请号：ES15763748

申请日：2015-09-02

Applicant: QUALCOMM INC

Inventor： AMARILIO LIOR ,  BALATSOS ARIS

IPC: G06F13/42 ,  G06F13/28

Abstract: Una fuente de audio que comprende: un puerto de salida multicanal (302(X)) configurado para ser acoplado a un bus (320) de multiplexado por división de tiempo, TDM, que comprende un bus multimedia inter-chip serie de baja potencia, SLIMbus, en la que el puerto de salida multicanal está configurado para conectarse simultáneamente a, al menos, dos canales de datos (316L, 318R) transportados por el bus TDM; y un conducto de datos (308) acoplado al puerto de salida multicanal y configurado para pasar datos de audio entrelazados (306) al puerto de salida multicanal.

公开(公告)号：IN1626MUN2014A

公开(公告)日：2015-07-03

申请号：IN1626MUN2014

申请日：2014-08-13

Applicant: QUALCOMM INC

Inventor： ALEKSIC MILIVOJE ,  BALATSOS ARIS ,  O'NEIL KEVIN ,  ESLIGER JAMES L ,  PLOTNICK BRUCE

IPC: H02J9/00

Abstract: A portable device includes a controller that is responsive to a remaining power capacity of the battery, and a power consumption level of the portable device and based on user prioritized functional processing capability features, dynamically controls functional processing capability features of the device. The controller provides power for a higher priority feature at the expense of a lower priority functional processing capability feature consistent with the user prioritized functional processing capability features. A wireless portable device is also disclosed that includes a wireless signal strength determinator that determines a received signal strength of the wireless device and a controller that adjusts the functional processing capability feature of the wireless device based on the determined received signal strength and based on battery capacity information. In this way, received signal strength information is used as a further input to determine how to best adjust functional processing capability features of the device.

公开(公告)号：HUE041527T2

公开(公告)日：2019-05-28

申请号：HUE15763748

申请日：2015-09-02

Applicant: QUALCOMM INC

Inventor： AMARILIO LIOR ,  BALATSOS ARIS

IPC: G06F13/42 ,  G06F13/28

公开(公告)号：CA2983800A1

公开(公告)日：2016-12-08

申请号：CA2983800

申请日：2016-04-27

Applicant: QUALCOMM INC

Inventor： GADELRAB SERAG MONIER ,  KOOB CHRISTOPHER EDWARD ,  BOOTH SIMON ,  BALATSOS ARIS ,  KUAN JOHNNY JONE WAI ,  RAMKUMAR MYIL ,  PABLA BHUPINDER SINGH ,  SWEENEY SEAN DAVID ,  PATSILARAS GEORGE

IPC: G06F9/46 ,  G06F9/48 ,  G06F11/07

Abstract: Systems and methods relate to managing shared resources in a multithreaded processor comprising two or more processing threads. Danger levels for the two or more threads are determined, wherein the danger level of a thread is based on a potential failure of the thread to meet a deadline due to unavailability of a shared resource. Priority levels associated with the two or more threads are also determined, wherein the priority level is higher for a thread whose failure to meet a deadline is unacceptable and the priority level is lower for a thread whose failure to meet a deadline is acceptable. The two or more threads are scheduled based at least on the determined danger levels for the two or more threads and priority levels associated with the two or more threads.

公开(公告)号：IN902MUN2014A

公开(公告)日：2015-04-17

申请号：IN902MUN2014

申请日：2014-05-15

Applicant: QUALCOMM INC

Inventor： GRUBER HANS GEORG ,  HARIHARAN MAGESH ,  ARCEO JULIO ,  MOHAN SUREN ,  BALATSOS ARIS

IPC: G06F13/42

Abstract: A method includes sending data from a first serial low power inter chip media bus (SLIMbus) component to a second SLIMbus component. The method further includes sending the data via at least a first SLIMbus data line of a plurality of SLIMbus data lines.

公开(公告)号：WO2011113025A3

公开(公告)日：2011-11-10

申请号：PCT/US2011028228

申请日：2011-03-11

Applicant: QUALCOMM INC ,  WANG SONG ,  BALATSOS ARIS

Inventor： WANG SONG ,  BALATSOS ARIS

IPC: H04L7/00 ,  H04L25/05

CPC classification number: H04L7/0029 ,  H04L25/068

Abstract: Techniques of this disclosure provide for adjustment of a conversion rate of a sampling rate converter (SRC) in real-time. The SRC determines relative timing of generated output samples based on non-approximated integer components that are recursively updated. The SRC may further base relative timing of output samples on a value of one or more step size components associated with the integer components. Also according to techniques of this disclosure, a conversion rate of an SRC may be adjusted in real-time based on a detected mismatch between a source clock of a digital input signal and a local clock.

Abstract translation: 本公开的技术提供实时调整采样率转换器（SRC）的转换率。 SRC根据递归更新的非近似整数分量确定生成的输出采样的相对时序。 SRC可以进一步将输出样本的相对定时基于与整数分量相关联的一个或多个步长分量的值。 同样根据本公开的技术，可基于检测到的数字输入信号的源时钟和本地时钟之间的失配来实时调整SRC的转换速率。