公开(公告)号：ES2519566T3

公开(公告)日：2014-11-07

申请号：ES10740813

申请日：2010-07-30

Applicant: QUALCOMM INC

Inventor： MARRA THOMAS D ,  HADJICHRISTOS ARISTOTELE ,  PLETCHER NATHAN M

IPC: H03F3/04 ,  H03F1/30 ,  H03F3/189

Abstract: Un aparato de ajuste de la polarización, que comprende: un medio para obtener una medición de una tensión desarrollada en los bordes de una resistencia parásita de un inductor (214) acoplado a al menos un transistor (212) de un amplificador (210); y un medio para generar al menos una tensión de polarización de entrada para el al menos un transistor (212) del amplificador (210) en base a la medición para obtener una corriente de polarización de blanco con destino al amplificador (210).

公开(公告)号：IN4462CHN2014A

公开(公告)日：2015-09-04

申请号：IN4462CHN2014

申请日：2014-06-16

Applicant: QUALCOMM INC

Inventor： ZHAO YU ,  PLETCHER NATHAN M

IPC: H03F1/02 ,  H03F1/56 ,  H03F3/195

Abstract: A multi mode driver amplifier with tunable load matching is disclosed. In an exemplary design an apparatus includes a multi mode driver amplifier and a tunable impedance matching circuit. The driver amplifier amplifies an input radio frequency RF signal and provides an amplified RF signal. The tunable impedance matching circuit matches an output impedance of the driver amplifier. The apparatus may include a main transmit path (510) and a bypass transmit path (512). The bypass transmit path (512) may include the driver amplifier (542) and the tunable impedance matching circuit (552) and no power amplifier. The main transmit path (510) may include a second driver amplifier (540) and a power amplifier (560). The main transmit path (510) may be selected for transmit power levels higher than a threshold level and the bypass transmit path (512) may be selected for transmit power levels lower than the threshold level.

公开(公告)号：WO2011022549A3

公开(公告)日：2011-04-21

申请号：PCT/US2010046021

申请日：2010-08-19

Applicant: QUALCOMM INC ,  ZHAO YU ,  NEJATI BABAK ,  PLETCHER NATHAN M ,  HADJICHRISTOS ARISTOTELE

Inventor： ZHAO YU ,  NEJATI BABAK ,  PLETCHER NATHAN M ,  HADJICHRISTOS ARISTOTELE

IPC: H03H7/38 ,  H03F1/42 ,  H03F3/00 ,  H03F3/193

CPC classification number: H03F1/42 ,  H03F1/223 ,  H03F3/193 ,  H03F2200/318 ,  H03H7/40

Abstract: A tunable inter-stage matching circuit that can improve performance is described. In an exemplary design, an apparatus includes a first active circuit (e.g., a driver amplifier), a second active circuit (e.g., a power amplifier), and a tunable inter-stage matching circuit coupled between the first and second active circuits. The tunable inter-stage matching circuit includes a tunable capacitor that can be varied in discrete steps to adjust impedance matching between the first and second active circuits. In an exemplary design, the tunable capacitor includes (i) a plurality of capacitors coupled in parallel and (ii) a plurality of switches coupled to the plurality of capacitors, one switch for each capacitor. Each switch may be turned on to select an associated capacitor or turned off to unselect the associated capacitor. The tunable capacitor may further include a fixed capacitor coupled in parallel with the plurality of capacitors.

Abstract translation: 描述了可以提高性能的可调谐级间匹配电路。 在示例性设计中，装置包括耦合在第一和第二有源电路之间的第一有源电路（例如，驱动器放大器），第二有源电路（例如，功率放大器）和可调谐级间匹配电路。 可调谐级间匹配电路包括可以在离散步骤中变化的可调谐电容器，以调整第一和第二有源电路之间的阻抗匹配。 在示例性设计中，可调谐电容器包括（i）并联耦合的多个电容器和（ii）耦合到多个电容器的多个开关，用于每个电容器的一个开关。 每个开关可以被接通以选择一个相关联的电容器或关闭以取消选择相关联的电容器。 可调谐电容器还可以包括与多个电容器并联耦合的固定电容器。

公开(公告)号：WO2011008562A2

公开(公告)日：2011-01-20

申请号：PCT/US2010040488

申请日：2010-06-29

Applicant: QUALCOMM INC ,  KLEMENS GUY ,  MYERS THOMAS A ,  FREDERICK JR NORMAN L ,  ZHAO YU ,  NEJATI BABAK ,  PLETCHER NATHAN M ,  HADJICHRISTOS ARISTOTELE

Inventor： KLEMENS GUY ,  MYERS THOMAS A ,  FREDERICK JR NORMAN L ,  ZHAO YU ,  NEJATI BABAK ,  PLETCHER NATHAN M ,  HADJICHRISTOS ARISTOTELE

IPC: H01L23/64 ,  H03F3/195

CPC classification number: H03F3/195 ,  H01L23/645 ,  H01L23/66 ,  H01L2223/6655 ,  H01L2223/6661 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/19015 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A compact integrated power amplifier is described herein. In an exemplary design, an apparatus includes (i) an integrated circuit (IC) die having at least one transistor for a power amplifier and (ii) an IC package having a load inductor for the power amplifier. The IC die is mounted on the IC package with the transistor(s) located over the load inductor. In an exemplary design, the IC die includes a transistor manifold that is placed over the load inductor on the IC package. The transistor(s) are fabricated in the transistor manifold, have a drain connection in the center of the transistor manifold, and have source connections on two sides of the transistor manifold. The IC die and the IC package may include one or more additional power amplifiers. The transistor(s) for each power amplifier may be located over the load inductor for that power amplifier.

Abstract translation: 这里描述了紧凑的集成功率放大器。 在示例性设计中，装置包括（i）具有用于功率放大器的至少一个晶体管的集成电路（IC）管芯，以及（ii）具有用于功率放大器的负载电感器的IC封装。 IC芯片安装在IC封装上，晶体管位于负载感应器上方。 在示例性设计中，IC管芯包括放置在IC封装上的负载电感器上的晶体管歧管。 晶体管制造在晶体管歧管中，在晶体管歧管的中心具有漏极连接，并且在晶体管歧管的两侧具有源极连接。 IC芯片和IC封装可以包括一个或多个附加的功率放大器。 每个功率放大器的晶体管可以位于该功率放大器的负载电感上。

公开(公告)号：WO2011014849A3

公开(公告)日：2011-06-23

申请号：PCT/US2010044033

申请日：2010-07-30

Applicant: QUALCOMM INC ,  MARRA THOMAS D ,  HADJICHRISTOS ARISTOTELE ,  PLETCHER NATHAN M

Inventor： MARRA THOMAS D ,  HADJICHRISTOS ARISTOTELE ,  PLETCHER NATHAN M

IPC: H03F1/30 ,  H03F3/189

CPC classification number: H03F1/301 ,  H03F1/30 ,  H03F3/04 ,  H03F3/189

Abstract: Techniques for monitoring and controlling bias current of amplifiers are described. In an exemplary design, an apparatus may include an amplifier and a bias circuit. The amplifier may include at least one transistor coupled to an inductor. The bias circuit may generate at least one bias voltage for the at least one transistor in the amplifier to obtain a target bias current for the amplifier. The bias circuit may generate the at least one bias voltage based on a voltage across the inductor in the amplifier, or a current through a current mirror formed with one of the at least one transistor in the amplifier, or a gate-to-source voltage of one of the at least one transistor in the amplifier, or a voltage in a replica circuit replicating the amplifier, or a current applied to the amplifier with a switched mode power supply disabled.

Abstract translation: 描述了用于监视和控制放大器的偏置电流的技术。 在示例性设计中，装置可以包括放大器和偏置电路。 放大器可以包括耦合到电感器的至少一个晶体管。 偏置电路可以产生用于放大器中的至少一个晶体管的至少一个偏置电压以获得放大器的目标偏置电流。 偏置电路可基于放大器中的电感器两端的电压或通过与放大器中的至少一个晶体管中的一个晶体管形成的电流镜的电流或者栅极至源极电压来生成至少一个偏置电压 放大器中的至少一个晶体管中的一个晶体管的电压，或复制放大器的复制电路中的电压，或者禁用开关模式电源而施加于放大器的电流。