Single-processor computer vision hardware control and application execution

    公开(公告)号:AU2018210818A1

    公开(公告)日:2019-06-27

    申请号:AU2018210818

    申请日:2018-01-12

    Applicant: QUALCOMM INC

    Abstract: Apparatuses, methods, and systems are presented for reacting to scene-based occurrences. Such an apparatus may comprise dedicated computer vision (CV) computation hardware configured to receive sensor data from a sensor array comprising a plurality of sensor pixels and capable of computing one or more CV features using readings from neighboring sensor pixels of the sensor array. The apparatus may further comprise a first processing unit configured to control operation of the dedicated CV computation hardware. The first processing unit may be further configured to execute one or more application programs and, in conjunction with execution of the one or more application programs, communicate with at least one input/output (I/O) device controller, to effectuate an I/O operation in reaction to an event generated based on operations performed on the one or more computed CV features.

    IMPLEMENTING SYNAPTIC LEARNING USING REPLAY IN SPIKING NEURAL NETWORKS

    公开(公告)号:CA2926824A1

    公开(公告)日:2015-05-14

    申请号:CA2926824

    申请日:2014-11-04

    Applicant: QUALCOMM INC

    Abstract: Aspects of the present disclosure relate to methods and apparatus for training an artificial nervous system. According to certain aspects, timing of spikes of an artificial neuron during a training iteration are recorded, the spikes of the artificial neuron are replayed according to the recorded timing, during a subsequent training iteration, and parameters associated with the artificial neuron are updated based, at least in part, on the subsequent training iteration.

    Single-processor computer vision hardware control and application execution

    公开(公告)号:AU2018210818B2

    公开(公告)日:2022-04-28

    申请号:AU2018210818

    申请日:2018-01-12

    Applicant: QUALCOMM INC

    Abstract: Apparatuses, methods, and systems are presented for reacting to scene-based occurrences. Such an apparatus may comprise dedicated computer vision (CV) computation hardware configured to receive sensor data from a sensor array comprising a plurality of sensor pixels and capable of computing one or more CV features using readings from neighboring sensor pixels of the sensor array. The apparatus may further comprise a first processing unit configured to control operation of the dedicated CV computation hardware. The first processing unit may be further configured to execute one or more application programs and, in conjunction with execution of the one or more application programs, communicate with at least one input/output (I/O) device controller, to effectuate an I/O operation in reaction to an event generated based on operations performed on the one or more computed CV features.

    SINGLE-PROCESSOR COMPUTER VISION HARDWARE CONTROL AND APPLICATION EXECUTION

    公开(公告)号:SG11201904976WA

    公开(公告)日:2019-08-27

    申请号:SG11201904976W

    申请日:2018-01-12

    Applicant: QUALCOMM INC

    Abstract: Singleprocessor Vision Sensor System 1350 Queries Peripheral Circuitry —0 1370 Dedicated Processor 1312 1314 r- 1 1340 Visual Sensor Array Unit Face Detection Event A 1330 4 0 1372 1374 110 Device Controller Memory CV Hardware Controller Core Application Processor Core Visual Input FIG. 13B 1-1 00 (12) INTERNATIONAL APPLICATION PUBLISHED UNDER THE PATENT COOPERATION TREATY (PCT) (19) World Intellectual Property Organization International Bureau (43) International Publication Date 26 July 2018 (26.07.2018) WIP0 I PCT omit VIII °nolo 10110111 OH oimIE (10) International Publication Number WO 2018/136325 Al (51) International Patent Classification: GOOK 9/00 (2006.01) GOOK 9 / 5 6 (2006.01) GOOK 9 / 4 6 (2006.01) (21) International Application Number: PCT/US2018/013501 (22) International Filing Date: 12 January 2018 (12.01.2018) (25) Filing Language: English (26) Publication Language: English (30) Priority Data: 15/413,390 23 January 2017 (23.01.2017) US (71) Applicant: QUALCOMM INCORPORATED [US/US]; ATTN: International IP Administration, 5775 Morehouse Drive, San Diego, California 92121-1714 (US). (72) Inventors: GOUSEV, Evgeni; 5775 Morehouse Dri- ve, San Diego, California 92121-1714 (US). GOVIL, Alok; 5775 Morehouse Drive, San Diego, California 92121-1714 (US). MAITAN, Jacek; 5775 Morehouse Dri- ve, San Diego, California 92121-1714 (US). RASQUIN- HA, Nelson; 5775 Morehouse Drive, San Diego, California 92121-1714 (US). RANGAN, Venkat; 5775 Morehouse Drive, San Diego, California 92121-1714 (US). PARK, Ed- win Chongwoo; 5775 Morehouse Drive, San Diego, Cali- fornia 92121-1714 (US). (74) Agent: CHANG, Ko-Fang et al.; Kilpatrick Townsend & Stockton LLP, Mailstop: IP Docketing - 22, 1100 Peachtree Street, N.E., Suite 2800, Atlanta, Georgia 30309 (US). (81) Designated States (unless otherwise indicated, for every kind of national protection available): AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, (54) Title: SINGLE-PROCESSOR COMPUTER VISION HARDWARE CONTROL AND APPLICATION EXECUTION (57) : Apparatuses, methods, and systems are presented for reacting to scene-based occurrences. Such an apparatus may comprise dedicated computer vision (CV) computation hardware configured to receive sensor data from a sensor array comprising a plurality of sensor pixels and capable of computing one or more CV features using readings from neighboring sensor pixels of the sensor array. The apparatus may further comprise a first processing unit configured to control operation of the dedicated CV computation hardware. The first processing unit may be further configured to execute one or more application programs and, in conjunction with execution of the one or more application programs, communicate with at least one input/output (I/O) device controller, to effectuate an I/O operation in reaction to an event generated based on operations performed on the one or more computed CV features. [Continued on next page] WO 2018/136325 Al MIDEDIMOMOIDEIREEMOMMIMIMMOHOMEHOIS DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW. (84) Designated States (unless otherwise indicated, for every kind of regional protection available): ARIPO (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW), Eurasian (AM, AZ, BY, KG, KZ, RU, TJ, TM), European (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR), OAPI (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG). Declarations under Rule 4.17: as to applicant's entitlement to apply for and be granted a patent (Rule 4.17(11)) as to the applicant's entitlement to claim the priority of the earlier application (Rule 4.17(iii)) Published: — with international search report (Art. 21(3))

    LOW-POWER ALWAYS-ON FACE DETECTION, TRACKING, RECOGNITION AND/OR ANALYSIS USING EVENTS-BASED VISION SENSOR

    公开(公告)号:CA2959549A1

    公开(公告)日:2016-04-07

    申请号:CA2959549

    申请日:2015-09-28

    Applicant: QUALCOMM INC

    Abstract: Techniques disclosed herein utilize a vision sensor that integrates a special-purpose camera with dedicated computer vision (CV) computation hardware and a dedicated low-power microprocessor for the purposes of detecting, tracking, recognizing, and/or analyzing subjects, objects, and scenes in the view of the camera. The vision sensor processes the information retrieved from the camera using the included low-power microprocessor and sends "events" (or indications that one or more reference occurrences have occurred, and, possibly, associated data) for the main processor only when needed or as defined and configured by the application. This allows the general-purpose microprocessor (which is typically relatively high-speed and high-power to support a variety of applications) to stay in a low-power (e.g., sleep mode) most of the time as conventional, while becoming active only when events are received from the vision sensor.

    COMPUTED SYNAPSES FOR NEUROMORPHIC SYSTEMS
    7.
    发明申请
    COMPUTED SYNAPSES FOR NEUROMORPHIC SYSTEMS 审中-公开
    神经系统的计算机仿真

    公开(公告)号:WO2015020802A3

    公开(公告)日:2015-05-14

    申请号:PCT/US2014047858

    申请日:2014-07-23

    Applicant: QUALCOMM INC

    Inventor: RANGAN VENKAT

    CPC classification number: G06N3/08 G06N3/049 G06N3/063 G06N3/082

    Abstract: Methods and apparatus are provided for determining synapses in an artificial nervous system based on connectivity patterns. One example method generally includes determining, for an artificial neuron, an event has occurred; based on the event, determining one or more synapses with other artificial neurons based on a connectivity pattern associated with the artificial neuron; and applying a spike from the artificial neuron to the other artificial neurons based on the determined synapses. In this manner, the connectivity patterns (or parameters for determining such patterns) for particular neuron types, rather than the connectivity itself, may be stored. Using the stored information, synapses may be computed on the fly, thereby reducing memory consumption and increasing memory bandwidth. This also saves time during artificial nervous system updates.

    Abstract translation: 提供了用于基于连接模式确定人造神经系统中的突触的方法和装置。 一个示例性方法通常包括为人造神经元确定已经发生事件; 基于事件,基于与人造神经元相关联的连接模式,确定与其他人造神经元的一个或多个突触; 并根据确定的突触将人造神经元的尖峰应用于其他人造神经元。 以这种方式,可以存储用于特定神经元类型而不是连接本身的连接模式(或用于确定这种模式的参数)。 使用存储的信息,可以即时计算突触,从而减少内存消耗并增加内存带宽。 这也节省了人造神经系统更新中的时间。

    METHOD AND APPARATUS FOR OPTIMIZED REPRESENTATION OF VARIABLES IN NEURAL SYSTEMS
    8.
    发明申请
    METHOD AND APPARATUS FOR OPTIMIZED REPRESENTATION OF VARIABLES IN NEURAL SYSTEMS 审中-公开
    神经系统中变量优化表示的方法与装置

    公开(公告)号:WO2014025619A2

    公开(公告)日:2014-02-13

    申请号:PCT/US2013053290

    申请日:2013-08-01

    Applicant: QUALCOMM INC

    CPC classification number: G06N3/02 G06N3/049 G10L19/038 G10L19/12

    Abstract: Certain aspects of the present disclosure support a technique for optimized representation of variables in neural systems. Bit-allocation for neural signals and parameters in a neural network described in the present disclosure may comprise allocating quantization levels to the neural signals based on at least one measure of sensitivity of a pre-determined performance metric to quantization errors in the neural signals, and allocating bits to the parameters based on the at least one measure of sensitivity of the pre-determined performance metric to quantization errors in the parameters.

    Abstract translation: 本公开的某些方面支持用于神经系统中变量的优化表示的技术。 在本公开中描述的神经网络中的神经信号和参数的位分配可以包括基于对神经信号中的量化误差的预定性能度量的灵敏度的至少一个度量来为神经信号分配量化级别,以及 基于对所述参数中的量化误差的所述预定性能度量的灵敏度的至少一个度量来将比特分配给所述参数。

    METHODS AND APPARATUS FOR IMPLEMENTING A BREAKPOINT DETERMINATION UNIT IN AN ARTIFICIAL NERVOUS SYSTEM
    9.
    发明申请
    METHODS AND APPARATUS FOR IMPLEMENTING A BREAKPOINT DETERMINATION UNIT IN AN ARTIFICIAL NERVOUS SYSTEM 审中-公开
    用于在人工神经系统中实施断点确定单元的方法和设备

    公开(公告)号:WO2015034640A3

    公开(公告)日:2015-05-14

    申请号:PCT/US2014051044

    申请日:2014-08-14

    Applicant: QUALCOMM INC

    CPC classification number: G06N3/10 G06F11/302 G06F11/3636 G06N3/049 G06N3/08

    Abstract: Methods and apparatus are provided for using a breakpoint determination unit to examine an artificial nervous system. One example method generally includes operating at least a portion of the artificial nervous system; using the breakpoint determination unit to detect that a condition exists based at least in part on monitoring one or more components in the artificial nervous system; and at least one of suspending, examining, modifying, or flagging the operation of the at least the portion of the artificial nervous system, based at least in part on the detection.

    Abstract translation: 提供了使用断点确定单元检查人造神经系统的方法和设备。 一个示例性方法通常包括操作人造神经系统的至少一部分; 使用所述断点确定单元至少部分地基于监测所述人造神经系统中的一个或多个组件来检测所述条件存在; 以及至少部分基于所述检测来暂停,检查,修改或标记所述人造神经系统的所述至少一部分的操作中的至少一者。

    EFFICIENT HARDWARE IMPLEMENTATION OF SPIKING NETWORKS
    10.
    发明申请
    EFFICIENT HARDWARE IMPLEMENTATION OF SPIKING NETWORKS 审中-公开
    SPI网络的有效硬件实现

    公开(公告)号:WO2014189970A3

    公开(公告)日:2015-04-09

    申请号:PCT/US2014038841

    申请日:2014-05-20

    Applicant: QUALCOMM INC

    CPC classification number: G06N3/063 G06N3/049 G06N3/08

    Abstract: Certain aspects of the present disclosure support operating simultaneously multiple super neuron processing units in an artificial nervous system, wherein a plurality of artificial neurons is assigned to each super neuron processing unit. The super neuron processing units can be interfaced with a memory for storing and loading synaptic weights and plasticity parameters of the artificial nervous system, wherein organization of the memory allows contiguous memory access.

    Abstract translation: 本公开的某些方面支持在人造神经系统中同时操作多个超级神经元处理单元,其中将多个人造神经元分配给每个超级神经元处理单元。 超神经元处理单元可以与用于存储和加载人造神经系统的突触权重和可塑性参数的存储器连接,其中存储器的组织允许连续的存储器访问。

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