公开(公告)号：BR112012022063A2

公开(公告)日：2016-08-30

申请号：BR112012022063

申请日：2011-02-28

Applicant: QUALCOMM INC

Inventor： GASTELUM DAMION B ,  SWEENEY FIFIN ,  VELEZ MARIO FRANCISCO ,  SHAH MILIND P

IPC: H01L23/367 ,  H01L23/498 ,  H01L25/065 ,  H01L25/10

公开(公告)号：WO2011109310A3

公开(公告)日：2011-10-27

申请号：PCT/US2011026539

申请日：2011-02-28

Applicant: QUALCOMM INC ,  SWEENEY FIFIN ,  SHAH MILIND P ,  VELEZ MARIO FRANCISCO ,  GASTELUM DAMION B

Inventor： SWEENEY FIFIN ,  SHAH MILIND P ,  VELEZ MARIO FRANCISCO ,  GASTELUM DAMION B

IPC: H01L23/498 ,  H01L23/367 ,  H01L25/065 ,  H01L25/10

CPC classification number: H01L23/3677 ,  H01L21/6835 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/25 ,  H01L24/48 ,  H01L24/82 ,  H01L25/03 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2518 ,  H01L2224/48091 ,  H01L2224/82001 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: In a multi-module integrated circuit package having a package substrate and package contacts, a die is embedded in the package substrate with thermal vias that couple hotspots on the embedded die to some of the package contacts.

Abstract translation: 在具有封装衬底和封装触点的多模块集成电路封装中，裸片被嵌入封装衬底中，其中热通孔将嵌入裸片上的热点耦合到一些封装触点。

公开(公告)号：WO2011094594A3

公开(公告)日：2011-12-08

申请号：PCT/US2011022999

申请日：2011-01-28

Applicant: QUALCOMM INC ,  SHAH MILIND P ,  VELEZ MARIO FRANCISCO ,  SWEENEY FIFIN

Inventor： SHAH MILIND P ,  VELEZ MARIO FRANCISCO ,  SWEENEY FIFIN

IPC: B81C1/00

CPC classification number: B81C1/0023 ,  B81B2207/012 ,  B81B2207/098 ,  B81C2203/035 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: An integrated circuit package includes a microelectromechanical systems (MEMS) device embedded in a packaging substrate. The MEMS device is located on a die embedded in the packaging substrate and covered by a hermetic seal. Low-stress material in the packaging substrate surrounds the MEMS device. Additionally, interconnects may be used as standoffs to reduce stress on the MEMS device. The MEMS device is embedded a distance into the packaging substrate leaving for example, 30-80 microns, between the hermetic seal of the MEMS device and the support surface of the packaging substrate. Embedding the MEMS device results in lower stress on the MEMS device.

Abstract translation: 集成电路封装包括嵌入在封装衬底中的微机电系统（MEMS）器件。 MEMS器件位于封装在封装衬底中的模具上并被气密密封覆盖。 封装基板中的低应力材料围绕着MEMS器件。 此外，互连可以用作支架以减小MEMS器件上的应力。 MEMS器件在MEMS器件的气密密封和封装衬底的支撑表面之间在距离包装衬底一段距离（例如30-80微米）内被嵌入。 嵌入MEMS器件导致MEMS器件的较低应力。

公开(公告)号：WO2010059724A3

公开(公告)日：2010-09-10

申请号：PCT/US2009064987

申请日：2009-11-18

Applicant: QUALCOMM INC ,  PAN YUANCHENG CHRISTOPHER ,  SWEENEY FIFIN ,  PAYNTER CHARLIE ,  BOWLES KEVIN R ,  GONZALEZ JASON R

Inventor： PAN YUANCHENG CHRISTOPHER ,  SWEENEY FIFIN ,  PAYNTER CHARLIE ,  BOWLES KEVIN R ,  GONZALEZ JASON R

IPC: H01L23/498 ,  H01L23/50 ,  H01L23/522 ,  H01L23/528

CPC classification number: H01L23/49816 ,  H01L23/50 ,  H01L23/5222 ,  H01L23/5286 ,  H01L23/642 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16265 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/32145 ,  H01L2224/48145 ,  H01L2924/00011 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor package has a capacitor die and a packaging substrate. The capacitor die is coupled to circuitry on a front or back side of a die coupled to the packaging substrate for providing decoupling capacitance. In one example, the capacitor die is coupled to a land side of the packaging substrate in an area depopulated of a packaging array and adjacent to the packaging array. In another example, the capacitor die may be stacked on the die and coupled through wire bonds to circuitry on the die. The capacitor die reduces impedance of the integrated circuit allowing operation at higher frequencies.

Abstract translation: 半导体封装具有电容器芯片和封装衬底。 电容器裸片耦合到耦合到封装衬底的裸片的正面或背面上的电路以提供去耦电容。 在一个示例中，电容器管芯在封装阵列的不填充区域中并且与封装阵列相邻地耦合到封装衬底的焊盘侧。 在另一个示例中，电容器管芯可以堆叠在管芯上并且通过引线键合耦合到管芯上的电路。 电容器管芯降低了集成电路的阻抗，允许在更高的频率下工作。