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    SCALABLE, HIGH-EFFICIENCY, HIGH-SPEED SERIALIZED INTERCONNECT
    1.
    发明申请
    SCALABLE, HIGH-EFFICIENCY, HIGH-SPEED SERIALIZED INTERCONNECT 审中-公开
    可扩展，高效率，高速串行互连

    公开(公告)号：WO2017136455A1

    公开(公告)日：2017-08-10

    申请号：PCT/US2017/016071

    申请日：2017-02-01

    Applicant: QUALCOMM INCORPORATED

    Inventor： KHAN, Raheel ,  CHENG, Scott ,  PHILIPPE, Pascal ,  ROMERA, Joaquin

    IPC: H04L29/06

    CPC classification number: G06F13/4291 ,  G06F9/00 ,  G06F13/364 ,  H04B1/40 ,  H04L7/0008 ,  H04L7/046 ,  H04L29/06 ,  H04L67/2823 ,  H04L69/00 ,  H04L69/22

    Abstract: Serial communication using a packetization protocol engineered for efficient transmission is provided. Data link layer (DLL) control packets can be generated for transmission of control messages. Each DLL control message packet can have a DLL control packet length, and the DLL control packet length can be a fixed length. Physical layer (PHY) control packets can be generated. Each PHY control packet can include one of the DLL control packets and a control token. The length of each PHY control packet can be the sum of the DLL control packet length and a control token length of the control token. The PHY control packets can be encapsulated in frames. Each of the frames can include a synchronization symbol having a symbol length. The length of each frame can be the sum of the symbol length and an encapsulation length, which can be twice the length of the PHY control packet.

    Abstract translation: 提供了使用为高效传输而设计的分组化协议的串行通信。 数据链路层（DLL）控制分组可以被生成用于传输控制消息。 每个DLL控制消息分组可以具有DLL控制分组长度，并且DLL控制分组长度可以是固定长度。 可以生成物理层（PHY）控制分组。 每个PHY控制分组可以包括DLL控制分组和控制令牌中的一个。 每个PHY控制分组的长度可以是DLL控制分组长度和控制令牌的控制令牌长度之和。 PHY控制分组可以封装在帧中。 每个帧可以包括具有符号长度的同步符号。 每个帧的长度可以是符号长度和封装长度的总和，该长度可以是PHY控制数据包长度的两倍。

    SELF-ERROR INJECTION TECHNIQUE FOR POINT-TO-POINT INTERCONNECT TO INCREASE TEST COVERAGE
    3.
    发明申请
    SELF-ERROR INJECTION TECHNIQUE FOR POINT-TO-POINT INTERCONNECT TO INCREASE TEST COVERAGE 审中-公开
    点对点自检错误注入技术可以提高测试覆盖率

    公开(公告)号：WO2017053093A1

    公开(公告)日：2017-03-30

    申请号：PCT/US2016/051092

    申请日：2016-09-09

    Applicant: QUALCOMM INCORPORATED

    Inventor： CHENG, Scott ,  KHAN, Raheel ,  BANGA, Kanwal

    IPC: H04L1/24

    CPC classification number: G06F11/261 ,  G06F11/263 ,  G06F11/27 ,  H04L1/241

    Abstract: Various aspects describe an on-chip, hardware error-generator component. In some cases, the hardware error-generator component connects to a data path between two components contained within a same chip. Upon receiving an error simulation input, the hardware error-generator component modifies data being transmitted on the data path by inserting a data pattern that simulates an error condition. Alternately or additionally, the hardware error-generator randomly alters one or more of the transmitted data bits.

    Abstract translation: 各种方面描述了片上硬件错误发生器组件。 在某些情况下，硬件错误发生器组件连接到同一芯片中包含的两个组件之间的数据路径。 在接收到错误模拟输入时，硬件错误发生器组件通过插入模拟错误状况的数据模式来修改在数据路径上传输的数据。 替代地或另外地，硬件错误发生器随机地改变一个或多个所发送的数据位。

    IMAGE SIGNAL PROCESSOR RESOURCE MANAGEMENT
    6.
    发明申请
    IMAGE SIGNAL PROCESSOR RESOURCE MANAGEMENT 审中-公开

    公开(公告)号：WO2021231019A1

    公开(公告)日：2021-11-18

    申请号：PCT/US2021/027274

    申请日：2021-04-14

    Applicant: QUALCOMM INCORPORATED

    Inventor： DESAI, Rohan ,  CHENG, Scott ,  CAI, Songhe ,  SANAM, Rakesh ,  RAUT, Abhay ,  COULTER, Michael Lee

    IPC: H04N21/4402 ,  H04N5/232 ,  H04N5/341 ,  H04N21/854

    Abstract: Aspects relate to an image signal processor that processes frames at changing frame rates. An example method includes receiving, by an image signal processor, a first sequence of image frames from an image sensor at a first frame rate, processing each image frame of the first sequence of image frames at the first frame rate, and receiving from the image sensor an indication of a frame rate change from the first frame rate to a second frame rate. The method also includes configuring one or more filters of the image signal processor to process image frames from the image sensor in response to receiving the indication of the frame rate change from the image sensor, receiving a second sequence of image frames from the image sensor at the second frame rate, and processing each image frame of the second sequence of image frames at the second frame rate.

    UNIDIRECTIONAL CLOCK SIGNALING IN A HIGH-SPEED SERIAL LINK
    7.
    发明申请
    UNIDIRECTIONAL CLOCK SIGNALING IN A HIGH-SPEED SERIAL LINK 审中-公开
    高速串行链路中的单向时钟信号

    公开(公告)号：WO2017136474A1

    公开(公告)日：2017-08-10

    申请号：PCT/US2017/016092

    申请日：2017-02-01

    Applicant: QUALCOMM INCORPORATED

    Inventor： KHAN, Raheel ,  CHENG, Scott ,  PHILIPPE, Pascal ,  ROMERA, Joaquin

    IPC: H04L7/00 ,  G06F13/42 ,  H04B1/40

    CPC classification number: G06F13/4291 ,  G06F9/00 ,  G06F13/364 ,  H04B1/40 ,  H04L7/0008 ,  H04L7/046 ,  H04L29/06 ,  H04L67/2823 ,  H04L69/00 ,  H04L69/22

    Abstract: Transmission of data over a serial link based on a unidirectional clock signal is provided. A unidirectional clock signal is generated based on a first clock of a master device. The unidirectional clock signal is sent to a slave device that is connected to the serial link. The master device transmits data to the slave device over the serial link based on the first clock. The slave device receives the unidirectional clock signal from a master device. The slave device transmits data over the serial link to the master device based on the unidirectional clock signal.

    Abstract translation: 提供基于单向时钟信号通过串行链路传输数据。 基于主设备的第一时钟生成单向时钟信号。 单向时钟信号被发送到连接到串行链路的从设备。 主设备基于第一时钟通过串行链路将数据发送到从设备。 从设备接收来自主设备的单向时钟信号。 从设备根据单向时钟信号通过串行链路将数据传输到主设备。

    IMAGE PROCESSING BASED ON OBJECT CATEGORIZATION
    8.
    发明申请
    IMAGE PROCESSING BASED ON OBJECT CATEGORIZATION 审中-公开

    公开(公告)号：WO2022039870A1

    公开(公告)日：2022-02-24

    申请号：PCT/US2021/042429

    申请日：2021-07-20

    Applicant: QUALCOMM INCORPORATED

    Inventor： PINHASOV, Eran ,  CHENG, Scott ,  SCHARAM, Eran ,  GUREVICH, Anatoly

    IPC: G06K9/00 ,  G06K9/46 ,  G06K9/40

    Abstract: Examples are described for applying different settings for image capture to different portions of image data. For example, an image sensor can capture image data of a scene and can send the image data to an image signal processor (ISP) and a classification engine for processing. The classification engine can determine that a first object image region depicts a first category of object, and a second object image region depicts a second category of object. Different confidence regions of the image data can identify different degrees of confidence in the classifications. The ISP can generate an image by applying a different settings to the different portions of the image data. The different portions of the image data can be identified based on the object image regions and confidence regions.

    SYSTEMS AND METHODS FOR REDUCED POWER CONSUMPTION VIA MULTI-STAGE STATIC REGION DETECTION
    9.
    发明申请
    SYSTEMS AND METHODS FOR REDUCED POWER CONSUMPTION VIA MULTI-STAGE STATIC REGION DETECTION 审中-公开
    用于通过多级静态区域检测降低功耗的系统和方法

    公开(公告)号：WO2018034737A1

    公开(公告)日：2018-02-22

    申请号：PCT/US2017/039450

    申请日：2017-06-27

    Applicant: QUALCOMM INCORPORATED

    Inventor： DONG, Suolong ,  CHENG, Scott ,  CHU, Jeffrey, Hao ,  CHRISTANTO, Neil ,  CHEUNG, Joseph ,  COULTER, Michael, Lee ,  TENG, Chia-Yuan ,  XU, Haoping

    IPC: G06T1/20

    CPC classification number: H04N5/23241 ,  G06K9/6202 ,  G06T1/20 ,  G06T3/4015 ,  G06T2207/10024 ,  H04N1/2112 ,  H04N5/23293 ,  H04N19/132

    Abstract: Methods and apparatus improve static region detection in an imaging pipeline. An imaging pipeline may perform detection of static regions of an image at multiple stages of the pipeline. For example, as static regions may be eliminated from further processing by the imaging pipeline, static region detection performed at an early stage of the pipeline may provide for maximized power savings. As images early in the pipeline may contain artifacts inhibiting detection of some static regions, additional static region detection may be performed after further image processing. For example, static region detection may be performed for a second time after some filtering is applied to images in the pipeline. Regions previously characterized as dynamic may be characterized as static later in the pipeline due to a reduction of noise for example provided by the filters, and differences between the static region detection at different positions within the imaging pipeline.

    Abstract translation: 方法和设备改进了成像管线中的静态区域检测。 成像管线可以在管线的多个阶段执行图像的静态区域的检测。 例如，由于可以通过成像管线从进一步处理中消除静态区域，所以在管线的早期阶段执行的静态区域检测可以提供最大化的功率节省。 由于流水线早期的图像可能包含抑制某些静态区域的检测的伪像，因此可以在进一步的图像处理之后执行额外的静态区域检测。 例如，可以在对流水线中的图像应用一些滤波之后第二次执行静态区域检测。 先前表征为动态的区域由于例如由滤波器提供的噪声的减少以及在成像管线内的不同位置处的静态区域检测之间的差异而可以被表征为稍后在流水线中的静态。

    PROGRAMMABLE DISTRIBUTED DATA PROCESSING IN A SERIAL LINK
    10.
    发明申请
    PROGRAMMABLE DISTRIBUTED DATA PROCESSING IN A SERIAL LINK 审中-公开
    串行链路中的可编程分布式数据处理

    公开(公告)号：WO2017136452A1

    公开(公告)日：2017-08-10

    申请号：PCT/US2017/016068

    申请日：2017-02-01

    Applicant: QUALCOMM INCORPORATED

    Inventor： KHAN, Raheel ,  CHENG, Scott ,  PHILIPPE, Pascal ,  ZETHNER, Graig ,  SEETHARAMAN, Vaidyanathan ,  BANGA, Kanwal, Preet, S. ,  BADAM, Srinivas

    IPC: H04B1/40 ,  G06F9/00 ,  H04L29/06 ,  H04L12/931

    CPC classification number: G06F13/4291 ,  G06F9/00 ,  G06F13/364 ,  H04B1/40 ,  H04L7/0008 ,  H04L7/046 ,  H04L29/06 ,  H04L67/2823 ,  H04L69/00 ,  H04L69/22

    Abstract: A serial transceiver that includes programmable distributed data processing is provided. The serial transceiver can include an ingress channel that receives serial ingress data and an egress channel that transmits serial egress data. The serial transceiver can also include first and second layers that are one and another of a transport layer, a link layer, or a physical layer (PHY). The first and second layers can include elements that process the ingress data and the egress data. The serial transceiver can also include a programmable controller, a first interconnect that connects the programmable controller to the first layer, and a second interconnect that connects the programmable controller to the second layer. The programmable controller can send first data via the first interconnect to the first layer, and the first data can be processed by one of the first layer elements.

    Abstract translation: 提供包括可编程分布式数据处理的串行收发器。 串行收发器可以包括接收串行入口数据的入口通道和发送串行出口数据的出口通道。 串行收发器还可以包括作为传输层，链路层或物理层（PHY）中的一个和另一个的第一层和第二层。 第一层和第二层可以包括处理入口数据和出口数据的元件。 串行收发器还可以包括可编程控制器，将可编程控制器连接到第一层的第一互连以及将可编程控制器连接到第二层的第二互连。 可编程控制器可以通过第一互连将第一数据发送到第一层，并且第一数据可以由第一层元件中的一个处理。

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