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    TUNABLE MULTI-BAND RECEIVER
    1.
    发明申请
    TUNABLE MULTI-BAND RECEIVER 审中-公开
    TUNABLE多带接收器

    公开(公告)号：WO2012166556A1

    公开(公告)日：2012-12-06

    申请号：PCT/US2012/039455

    申请日：2012-05-24

    Applicant: QUALCOMM Incorporated ,  SAHOTA, Gurkanwal Singh ,  CICCARELLI, Steven C. ,  PARK, Sang-June ,  PERSICO, Charles J.

    Inventor： SAHOTA, Gurkanwal Singh ,  CICCARELLI, Steven C. ,  PARK, Sang-June ,  PERSICO, Charles J.

    IPC: H04B1/52 ,  H04B1/10 ,  H04B1/00

    CPC classification number: H04B1/525 ,  H03H2007/013 ,  H04B1/006 ,  H04B1/1036

    Abstract: A tunable multi-band receiver supporting operation on a plurality of frequency bands is disclosed. In an exemplary design, the tunable multi-band receiver includes an antenna tuning network, a tunable notch filter, and at least one low noise amplifier (LNA). The antenna tuning network tunes an antenna (e.g., a diversity antenna) to a receive band in a plurality of receive bands. The tunable notch filter is tunable to a transmit band in a plurality of transmit bands and attenuates signal components in the transmit band. One LNA among the at least one LNA amplifies an output signal from the tunable notch filter. The tunable multi-band receiver may further include one or more additional tunable notch filters to further attenuate the signal components in the transmit band.

    Abstract translation: 公开了一种在多个频带上支持操作的可调谐多频带接收机。 在示例性设计中，可调谐多频带接收机包括天线调谐网络，可调谐陷波滤波器和至少一个低噪声放大器（LNA）。 天线调谐网络将天线（例如，分集天线）调谐到多个接收频带中的接收频带。 可调陷波滤波器可调谐到多个发射频带中的发射频带，并衰减发射频带中的信号分量。 至少一个LNA中的一个LNA放大来自可调陷波滤波器的输出信号。 可调谐多频带接收机还可以包括一个或多个附加可调陷波滤波器，以进一步衰减发射频带中的信号分量。

    LOW-POWER WIRELESS DIVERSITY RECEIVER WITH MULTIPLE RECEIVE PATHS
    2.
    发明申请
    LOW-POWER WIRELESS DIVERSITY RECEIVER WITH MULTIPLE RECEIVE PATHS 审中-公开
    低功率无线多路接收器，带有多个接收模块

    公开(公告)号：WO2005064816A1

    公开(公告)日：2005-07-14

    申请号：PCT/US2004/042783

    申请日：2004-12-17

    Applicant: QUALCOMM Incorporated ,  PERSICO, Charles J. ,  GARD, Kevin ,  SAHOTA, Gurkanwal, Kamal ,  MIYAZAKI, Shinichi ,  CICCARELLI, Steven C.

    Inventor： PERSICO, Charles J. ,  GARD, Kevin ,  SAHOTA, Gurkanwal, Kamal ,  MIYAZAKI, Shinichi ,  CICCARELLI, Steven C.

    IPC: H04B7/08

    CPC classification number: H04K3/224 ,  H04B1/109 ,  H04B7/082

    Abstract: A low-power diversity receiver includes at least two receive paths, each of which is designated as a primary or secondary receive path. A primary receive path is compliant with system requirements (e.g., IS-98D requirements). A secondary receive path is not fully compliant with the system requirements and is designed for lower power, less area, and lower cost than the primary receive path. For a multi-antenna receiver, the two receive paths may be used to simultaneously process two received signals from two antennas. For a single-antenna receiver, either the primary or secondary receive path is selected, e.g., depending on whether or not large amplitude "jammers" are detected, to process a single input signal from one antenna. The receiver may include additional receive paths for additional frequency bands and/or GPS.

    Abstract translation: 低功率分集接收器包括至少两个接收路径，每个接收路径被指定为主要或次要接收路径。 主要接收路径符合系统要求（例如，IS-98D要求）。 辅助接收路径不完全符合系统要求，并且设计用于比主接收路径更低的功率，更少的面积和更低的成本。 对于多天线接收机，两个接收路径可以用于同时处理来自两个天线的两个接收信号。 对于单天线接收机，例如，取决于是否检测到大的振幅“干扰”，选择主要或次要接收路径来处理来自一个天线的单个输入信号。 接收机可以包括用于附加频带和/或GPS的附加接收路径。

    TECHNIQUES FOR CONTROLLING OPERATION OF CONTROL LOOPS IN A RECEIVER
    3.
    发明申请
    TECHNIQUES FOR CONTROLLING OPERATION OF CONTROL LOOPS IN A RECEIVER 审中-公开
    用于控制接收器中控制杆操作的技术

    公开(公告)号：WO2007134201A2

    公开(公告)日：2007-11-22

    申请号：PCT/US2007/068724

    申请日：2007-05-11

    Applicant: QUALCOMM Incorporated ,  CICCARELLI, Steven C. ,  BANISTER, Brian Clarke ,  GEORGE, Brian ,  LAU, Soon-seng ,  GUDEM, Prasad ,  RAGHUPATHY, Arun

    Inventor： CICCARELLI, Steven C. ,  BANISTER, Brian Clarke ,  GEORGE, Brian ,  LAU, Soon-seng ,  GUDEM, Prasad ,  RAGHUPATHY, Arun

    IPC: H04B1/10

    CPC classification number: H04B1/109

    Abstract: Techniques for controlling operation of control loops in a receiver are described. The operation of at least one control loop is modified in conjunction with a change in operating state, which may correspond to a change in linearity state, gain state, operating frequency, antenna configuration, etc. A change in linearity state may occur when jammers are detected and may cause bias current of analog circuit blocks to be adjusted. The at least one control loop to be modified may include a DC loop, an AGC loop, etc. The operation of a control loop may be modified by disabling the control loop or changing its time constant prior to changing operating state, waiting a predetermined amount of time to allow the receiver to settle, and enabling the control loop or restoring its time constant after waiting the predetermined amount of time.

    Abstract translation: 描述了用于控制接收机中的控制环路的操作的技术。 结合操作状态的改变来修改至少一个控制回路的操作，其可以对应于线性状态，增益状态，操作频率，天线配置等的改变。线性状态的变化可能发生在干扰器 并且可能导致模拟电路块的偏置电流被调整。 要修改的至少一个控制环路可以包括DC环路，AGC环路等。可以通过在改变操作状态之前禁用控制环路或改变其时间常数来修改控制环路的操作，等待预定量 的时间以允许接收机安定，并且在等待预定时间量之后启用控制环路或恢复其时间常数。

    ADJUSTABLE-BIAS VCO
    4.
    发明申请
    ADJUSTABLE-BIAS VCO 审中-公开

    公开(公告)号：WO2006055792A1

    公开(公告)日：2006-05-26

    申请号：PCT/US2005/041849

    申请日：2005-11-17

    Applicant: QUALCOMM Incorporated ,  GOLDBLATT, Jeremy Mark ,  AHN, Hee Tae ,  CICCARELLI, Steven C.

    Inventor： GOLDBLATT, Jeremy Mark ,  AHN, Hee Tae ,  CICCARELLI, Steven C.

    IPC: H03L7/099 ,  H03B5/12 ,  H04B1/10

    CPC classification number: H03L7/18 ,  H03B5/1218 ,  H03B5/1231 ,  H03B5/1243 ,  H03L5/00 ,  H03L7/099 ,  H03L2207/06 ,  H04B1/109 ,  H04B1/71

    Abstract: A dynamically programmable RF receiver includes an adjustable bias voltage-controlled oscillator (ABVCO) that operates in both low-interference and high-interference modes. The ABVCO uses a drive current to generate an output signal whose frequency varies based on a control voltage. When a jammer detector detects an interference signal, a state machine adjusts the ABVCO from the low-interference mode to the high-interference mode. Reciprocal mixing between the interference signal and phase noise in the output signal is reduced in the high-interference mode by increasing the drive current to reduce the phase noise. The ABVCO switches to the high-interference mode when a bias control circuit sends a bias control signal to the ABVCO, causing the ABVCO to generate the output signal using a greater amount of drive current. A programmable register contains a control value that determines the magnitude of the bias control signal and ultimately the magnitude of the drive current.

    Abstract translation: 动态可编程RF接收器包括一个可调低压干扰和高干扰模式的可调偏置压控振荡器（ABVCO）。 ABVCO使用驱动电流来产生其频率根据控制电压而变化的输出信号。 当干扰检测器检测到干扰信号时，状态机将ABVCO从低干扰模式调整为高干扰模式。 通过增加驱动电流以降低相位噪声，可以在高干扰模式下降低输出信号中的干扰信号与相位噪声之间的相互混合。 当偏置控制电路向ABVCO发送偏置控制信号时，ABVCO切换到高干扰模式，导致ABVCO使用更大的驱动电流产生输出信号。 可编程寄存器包含一个控制值，用于确定偏置控制信号的幅度，最终确定驱动电流的大小。

    DYNAMIC REFERENCE FREQUENCY FOR FRACTIONAL-N PHASE-LOCKED LOOP
    6.
    发明申请
    DYNAMIC REFERENCE FREQUENCY FOR FRACTIONAL-N PHASE-LOCKED LOOP 审中-公开
    分段N相锁定环路的动态参考频率

    公开(公告)号：WO2009111346A1

    公开(公告)日：2009-09-11

    申请号：PCT/US2009/035577

    申请日：2009-02-27

    Applicant: QUALCOMM Incorporated ,  CICCARELLI, Steven C. ,  BOSSU, Frederic ,  APARIN, Vladimir ,  WANG, Kevin H.

    Inventor： CICCARELLI, Steven C. ,  BOSSU, Frederic ,  APARIN, Vladimir ,  WANG, Kevin H.

    IPC: H03L7/197 ,  H04B15/06

    CPC classification number: H03L7/1974

    Abstract: Within a receiver, the frequency of a comparison reference clock signal supplied to a fractional-N Phase-Locked Loop (PLL) is dynamically changed such that undesirable reciprocal mixing of reference spurs with known jammers (for example, transmit leakage) is minimized. As the transmit channel changes within a band, and as the transmit leakage frequency changes, a circuit changes the frequency of the comparison reference clock signal such that reference spurs generated by the PLL are moved in frequency so that they do not reciprocally mix with transmitter leakage in undesirable ways. In a second aspect, the PLL is operable either as an integer-N PLL or a fractional-N PLL. In low total receive power situations, the PLL operates as an integer-N PLL to reduce receiver susceptibility to fractional-N spurs. In a third aspect, jammer detect information is used to determine the comparison reference clock signal frequency.

    Abstract translation: 在接收机内，提供给分数N锁相环（PLL）的比较参考时钟信号的频率被动态地改变，使得具有已知干扰的参考杂波（例如，传输泄漏）的不期望的相互混合被最小化。 当发射信道在频带内变化时，并且随着发射泄漏频率的变化，电路改变比较参考时钟信号的频率，使得PLL产生的参考杂波频率移动，使得它们不与发射机泄漏相互混合 以不良的方式。 在第二方面，PLL可以作为整数N个PLL或分数N PLL来操作。 在低总接收功率情况下，PLL作为整数N PLL进行操作，以减少接收机对分数N个杂散的敏感性。 在第三方面，使用干扰检测信息来确定比较参考时钟信号频率。

    DYNAMIC REFERENCE FREQUENCY FOR FRACTIONAL-N PHASE-LOCKED LOOP
    7.
    发明公开
    DYNAMIC REFERENCE FREQUENCY FOR FRACTIONAL-N PHASE-LOCKED LOOP 有权
    动态频率REFERENCE FOR A N分数相回路

    公开(公告)号：EP2258048A1

    公开(公告)日：2010-12-08

    申请号：EP09717811.5

    申请日：2009-02-27

    Applicant: QUALCOMM Incorporated

    Inventor： CICCARELLI, Steven C. ,  BOSSU, Frederic ,  APARIN, Vladimir ,  WANG, Kevin H.

    IPC: H03L7/197 ,  H04B15/06

    CPC classification number: H03L7/1974

    Abstract: Within a receiver, the frequency of a comparison reference clock signal supplied to a fractional-N Phase-Locked Loop (PLL) is dynamically changed such that undesirable reciprocal mixing of reference spurs with known jammers (for example, transmit leakage) is minimized. As the transmit channel changes within a band, and as the transmit leakage frequency changes, a circuit changes the frequency of the comparison reference clock signal such that reference spurs generated by the PLL are moved in frequency so that they do not reciprocally mix with transmitter leakage in undesirable ways. In a second aspect, the PLL is operable either as an integer-N PLL or a fractional-N PLL. In low total receive power situations, the PLL operates as an integer-N PLL to reduce receiver susceptibility to fractional-N spurs. In a third aspect, jammer detect information is used to determine the comparison reference clock signal frequency.

    IF JAMMERS ARE DETECTED THE SIGNAL LEVEL AT WHICH LNA GAIN IS CHANGED IS ALTERED
    9.
    发明申请
    IF JAMMERS ARE DETECTED THE SIGNAL LEVEL AT WHICH LNA GAIN IS CHANGED IS ALTERED 审中-公开

    公开(公告)号：WO2007134197A3

    公开(公告)日：2007-11-22

    申请号：PCT/US2007/068714

    申请日：2007-05-10

    Applicant: QUALCOMM Incorporated ,  CICCARELLI, Steven C. ,  GEORGE, Brian ,  LAU, Soon-seng

    Inventor： CICCARELLI, Steven C. ,  GEORGE, Brian ,  LAU, Soon-seng

    IPC: H04B1/10

    Abstract: Techniques for operating a receiver to achieve good linearity performance and higher receive signal to noise ratio are described. The receiver includes one or more circuit blocks, e.g., a low noise amplifier (LNA), having discrete gain states. The gain states are selected based on switch points, with each switch point indicating a specific received signal level at which to switch from one gain state to another gain state. The switch points may be dynamically selected based on channel conditions, which may be characterized by the presence or absence or strength or frequency of jammers. A first set of switch points may be selected when jammers are detected, and a second set of switch points may be selected when jammers are not detected. The gain states are selected in accordance with the set of switch points selected for use.

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