公开(公告)号：WO2019108360A1

公开(公告)日：2019-06-06

申请号：PCT/US2018/059726

申请日：2018-11-08

Applicant: QUALCOMM INCORPORATED

Inventor： KIDWELL JR., Donald William ,  SHENOY, Ravindra Vaman ,  LEWIS, Alan ,  FERGUSON, Christopher Feuling

IPC: H01L49/02 ,  H01L23/522 ,  H01L23/64 ,  H01F17/00 ,  H01F41/04

Abstract: Some aspects pertain to an inductor apparatus that includes a first metal layer including a plurality of first interconnects, a second metal including a plurality of second interconnects, a first dielectric layer between the first metal layer and the second metal layer, and an inductor. The inductor includes a plurality of vias, where the plurality of vias are configured to couple the plurality of first interconnects to the plurality of second interconnects. The inductor includes a plurality of inductor loops formed by the plurality of vias, the plurality of first interconnects and the plurality of second interconnects. The inductor further includes a first magnetic layer and a second magnetic layer, located between the first interconnects and the second interconnects; and a third magnetic layer and an optional fourth magnetic layer outside of the plurality of inductor loops.

公开(公告)号：EP3718153A1

公开(公告)日：2020-10-07

申请号：EP18811684.2

申请日：2018-11-08

Applicant: Qualcomm Incorporated

Inventor： KIDWELL JR., Donald William ,  SHENOY, Ravindra Vaman ,  LEWIS, Alan ,  FERGUSON, Christopher Feuling

IPC: H01L49/02 ,  H01L23/522 ,  H01L23/64 ,  H01F17/00 ,  H01F41/04