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    FAST SETTLING PEAK DETECTOR
    3.
    发明申请
    FAST SETTLING PEAK DETECTOR 审中-公开
    快速安定检测器

    公开(公告)号：WO2018089164A1

    公开(公告)日：2018-05-17

    申请号：PCT/US2017/056315

    申请日：2017-10-12

    Applicant: QUALCOMM INCORPORATED

    Inventor： KARMAKER, Rahul

    IPC: H03F1/52 ,  G01R19/04 ,  H03G3/30

    Abstract: The present disclosure describes aspects of a fast settling peak detector. In some aspects, a peak detector circuit includes a first transistor having a gate coupled to an input of the circuit at which a signal is received and a drain coupled to a source of a second transistor. Current may flow in the first and second transistors responsive to the signal. The circuit also includes a third transistor having a gate coupled, via a signal-inverting component, to the input of the circuit and a drain coupled to a source of a fourth transistor. Through an inversion of the signal, other current flowing in the third and fourth transistor can reduce or cancel a frequency component of the current in the first and second transistors. In some cases, this precludes a need to filter the frequency component from an output of the circuit.

    Abstract translation: 本公开描述了快速建立峰值检测器的各方面。 在一些方面，峰值检测器电路包括第一晶体管，该第一晶体管具有耦合到电路的输入端的栅极，信号在该输入端被接收，漏极耦合到第二晶体管的源极。 响应于该信号，电流可以在第一和第二晶体管中流动。 该电路还包括第三晶体管，该第三晶体管具有经由信号反相组件耦合到电路的输入的栅极和耦合到第四晶体管的源极的漏极。 通过信号的反转，在第三和第四晶体管中流动的其他电流可以减小或消除第一和第二晶体管中的电流的频率分量。 在某些情况下，这不需要从电路输出中滤除频率分量。

    SOURCE-DEGENERATED AMPLIFICATION STAGE WITH RAIL-TO-RAIL OUTPUT SWING
    4.
    发明申请
    SOURCE-DEGENERATED AMPLIFICATION STAGE WITH RAIL-TO-RAIL OUTPUT SWING 审中-公开
    轨到轨输出摆动的源退化放大级

    公开(公告)号：WO2017213804A2

    公开(公告)日：2017-12-14

    申请号：PCT/US2017/032661

    申请日：2017-05-15

    Applicant: QUALCOMM INCORPORATED

    Inventor： KARMAKER, Rahul

    IPC: H03F3/45

    CPC classification number: H03F3/265 ,  H01L29/785 ,  H03F3/45 ,  H03F3/45179 ,  H03F3/45197 ,  H03F3/45264 ,  H03F2200/498 ,  H03F2203/45468 ,  H03F2203/45496 ,  H03F2203/45644 ,  H04W84/042

    Abstract: Certain aspects of the present disclosure generally relate to using cross-coupled transistors for source degeneration of an amplification stage. For example, the amplification stage generally includes a differential amplifier comprising transistors, cross-coupled transistors coupled to the differential amplifier, and an impedance coupled between drains of the cross-coupled transistors. In certain aspects, the differential amplifier comprises a push-pull amplifier, and the transistors of the push-pull amplifier comprise cascode-connected transistors.

    Abstract translation: 本公开的某些方面一般涉及使用交叉耦合晶体管用于放大级的源极退化。 例如，放大级通常包括差分放大器，该差分放大器包括晶体管，耦合到差分放大器的交叉耦合晶体管以及耦合在交叉耦合晶体管的漏极之间的阻抗。 在某些方面，差分放大器包括推挽式放大器，并且推挽式放大器的晶体管包括共源共栅连接的晶体管。

    CENTER FREQUENCY AND Q TUNING OF BIQUAD FILTER BY AMPLITUDE-LIMITED OSCILLATION-BASED CALIBRATION
    7.
    发明申请
    CENTER FREQUENCY AND Q TUNING OF BIQUAD FILTER BY AMPLITUDE-LIMITED OSCILLATION-BASED CALIBRATION 审中-公开
    双振幅滤波器的中心频率和Q调谐（基于振幅的振动校准）

    公开(公告)号：WO2018034779A1

    公开(公告)日：2018-02-22

    申请号：PCT/US2017/042817

    申请日：2017-07-19

    Applicant: QUALCOMM INCORPORATED

    Inventor： ANDRABI, Shuja ,  KARMAKER, Rahul

    IPC: H04B1/00 ,  H03H11/12

    Abstract: Certain aspects of the present disclosure provide methods and apparatus for calibrating a tunable active filter. One example apparatus is a filter circuit that generally includes a tunable active filter comprising at least one amplifier and a first feedback path coupled between an input and an output of the at least one amplifier, the first feedback path comprising at least one switch; and an amplitude limiter coupled to the tunable active filter and comprising at least one transistor disposed in a second feedback path coupled between the input and the output of the at least one amplifier.

    Abstract translation: 本公开的某些方面提供了用于校准可调谐有源滤波器的方法和设备。 一个示例装置是滤波器电路，其通常包括可调谐有源滤波器，所述可调谐有源滤波器包括至少一个放大器和耦合在所述至少一个放大器的输入和输出之间的第一反馈路径，所述第一反馈路径包括至少一个开关; 以及振幅限制器，其耦合到所述可调谐有源滤波器并且包括设置在耦合在所述至少一个放大器的所述输入和所述输出之间的第二反馈路径中的至少一个晶体管。

    HARMONIC REJECTION FILTER WITH TRANSIMPEDANCE AMPLIFIERS
    8.
    发明申请
    HARMONIC REJECTION FILTER WITH TRANSIMPEDANCE AMPLIFIERS 审中-公开

    公开(公告)号：WO2020172367A1

    公开(公告)日：2020-08-27

    申请号：PCT/US2020/018974

    申请日：2020-02-20

    Applicant: QUALCOMM INCORPORATED

    Inventor： KARMAKER, Rahul

    IPC: H03F3/187 ,  H03F3/68 ,  H04B1/10 ,  H03D7/16 ,  H03F3/45

    Abstract: An apparatus is disclosed for a harmonic rejection filter with transimpedance amplifiers. In an example aspect, the apparatus includes a harmonic rejection filter with at least three input nodes, at least one output node, a first transimpedance amplifier, a first set of transimpedance amplifiers, and a scaling current converter. The at least three input nodes include a first input node, a second input node, and a third input node. The at least one output node includes a first output node. The first transimpedance amplifier is coupled between the first input node and the first output node. The first set of transimpedance amplifiers include a second transimpedance amplifier coupled to the second input node and a third transimpedance amplifier coupled to the third input node. The scaling current converter is coupled between outputs associated with the first set of transimpedance amplifiers and an input of the first transimpedance amplifier.

    FILTER CIRCUIT WITH COMPLEX BASEBAND FILTERS FOR NON-CONTIGUOUS CARRIER AGGREGATION
    9.
    发明申请
    FILTER CIRCUIT WITH COMPLEX BASEBAND FILTERS FOR NON-CONTIGUOUS CARRIER AGGREGATION 审中-公开

    公开(公告)号：WO2019018054A1

    公开(公告)日：2019-01-24

    申请号：PCT/US2018/033694

    申请日：2018-05-21

    Applicant: QUALCOMM INCORPORATED

    Inventor： ZHUO, Wei ,  GATHMAN, Timothy Donald ,  XU, Wenbang ,  CHANG, Li-chung ,  LI, Rui ,  KARMAKER, Rahul

    IPC: H04B1/10 ,  H04L5/00 ,  H04B1/00 ,  H04B1/30 ,  H03D3/00 ,  H03D7/16

    Abstract: A filter circuit may include a first path having a first complex baseband filter. The circuit may further include a second path having a second complex baseband filter. The circuit may further include a combiner coupled to an output of the first complex baseband filter and an output of the second complex baseband filter. Aspects of the present disclosure provide a radio frequency (RF) baseband filter for facilitating carrier aggregation (CA), such as non-contiguous CA. In some aspects, an RF baseband filter may independently adjust a gain of different bandwidth combinations of different frequencies while filtering out a jammer. Advantages of the RF baseband filter include significant reduction in current consumption, as compared to using two separate downlink paths (DLPs), and flexibility for independent gain control.

    CLASS AB AMPLIFIER
    10.
    发明申请
    CLASS AB AMPLIFIER 审中-公开
    AB类放大器

    公开(公告)号：WO2016204888A1

    公开(公告)日：2016-12-22

    申请号：PCT/US2016/031912

    申请日：2016-05-11

    Applicant: QUALCOMM INCORPORATED

    Inventor： MITTAL, Ayush ,  RAJENDRAN, Gireesh ,  KARMAKER, Rahul

    IPC: H03F3/24 ,  H03F3/45 ,  H03F3/30 ,  H03F3/19

    CPC classification number: H03F1/0205 ,  H03F3/19 ,  H03F3/211 ,  H03F3/245 ,  H03F3/3022 ,  H03F3/45192 ,  H03F3/45219 ,  H03F3/45654 ,  H03F2200/294 ,  H03F2200/451 ,  H03F2203/21106 ,  H03F2203/30015 ,  H03F2203/45008 ,  H03F2203/45134

    Abstract: A class AB amplifier (400) may include an input stage (410, 420), a first folded cascode stage (430), a second folded cascode stage (440), and a class AB output stage (340). In some embodiments, the class AB output stage (340)may provide differential output signals (345). The common-mode voltage of the differential output signals may be controlled via a correction signal (362) coupled to a selected folded cascode stage (440). The correction signal (362) may control the common-mode voltage of the differential output signals by altering bias currents within the selected folded cascode stage (440). The other cascode stage (430) may include bias currents controlled by relatively fixed bias voltages (435).

    Abstract translation: AB类放大器（400）可以包括输入级（410,420），第一折叠共源共栅级（430），第二折叠共源共栅级（440）和AB类输出级（340）。 在一些实施例中，AB类输出级（340）可以提供差分输出信号（345）。 差分输出信号的共模电压可以通过耦合到所选择的折叠共源共栅级（440）的校正信号（362）来控制。 校正信号（362）可以通过改变所选择的折叠共源共栅级（440）内的偏置电流来控制差分输出信号的共模电压。 另一个共源共栅级（430）可以包括由相对固定的偏置电压（435）控制的偏置电流。

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