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1.发明申请
公开(公告)号：WO2022005629A1
公开(公告)日：2022-01-06
申请号：PCT/US2021/032308
申请日：2021-05-13
Applicant: QUALCOMM INCORPORATED
Inventor： BAKHSHIANI, Mehran , LAKDAWALA, Hasnain , ABBAS MOHAMED HELMY, Ahmed , KARMAKER, Rahul , GUHADOS, Shankar , GATTA, Francesco
IPC: H03H11/12 , H03H11/04 , H04B1/10 , H03F2200/129 , H03F2200/165 , H03F2203/45526 , H03F3/45475 , H03G3/30 , H03H11/1217 , H03H11/1226 , H03H11/1291 , H03H19/004 , H03H2011/0483 , H03H2011/0494 , H04B1/0032 , H04B1/0039 , H04B1/0042 , H04B1/0078 , H04B1/1615 , H04B1/18
Abstract: An aspect includes a filtering method including operating a first filter to filter a first input signal to generate a first output signal; operating a second filter to filter a second input signal to generate a second output signal; and selectively coupling at least a portion of the second filter with the first filter to filter a third input signal to generate a third output signal. Another aspect includes a filtering method including operating switching devices to configure a filter with a first set of pole(s); filtering a first input signal to generate a first output signal with the filter configured with the first set of pole(s); operating the switching devices to configure the filter with a second set of poles; and filtering a second input signal to generate a second output signal with the filter configured with the second set of poles.
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公开(公告)号：EP4173141A1
公开(公告)日：2023-05-03
申请号：EP21745568.2
申请日：2021-06-25
Applicant: QUALCOMM Incorporated
Inventor： MOSLEHI BAJESTAN, Masoud , ZANUSO, Marco , HOSSAIN, Razak , LAKDAWALA, Hasnain
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公开(公告)号：WO2018128764A1
公开(公告)日：2018-07-12
申请号：PCT/US2017/066246
申请日：2017-12-14
Applicant: QUALCOMM INCORPORATED
Inventor： HANAFI, Bassel , ABDELHALEM, Sherif , LAKDAWALA, Hasnain
IPC: H03F3/193 , H03F3/26 , H03F1/22 , H03F1/56 , H03F3/21 , H03F3/24 , H03F3/68 , H03F3/72 , H03G3/30
CPC classification number: H03G1/0005 , H03F1/0205 , H03F1/223 , H03F1/56 , H03F3/19 , H03F3/193 , H03F3/21 , H03F3/211 , H03F3/245 , H03F3/265 , H03F3/68 , H03F3/72 , H03F2200/111 , H03F2200/213 , H03F2200/222 , H03F2200/231 , H03F2200/294 , H03F2200/42 , H03F2200/451 , H03F2200/546 , H03G1/0017 , H03G3/3052 , H03G2201/103 , H03G2201/106
Abstract: Certain aspects of the present disclosure generally relate to a multi-output amplifier (400) implemented using a capacitive attenuator (414). For example, the multi-output amplifier (400) generally includes a first capacitive attenuator (414) coupled to an input node of the multi-output amplifier (400). In certain aspects, the multi-output amplifier (400) also includes a first amplification stage (416) having an input coupled to a tap node of the first capacitive attenuator (414) and an output coupled to a first output node of the multi-output amplifier (400), and a second amplification stage (418) having an output coupled to a second output node of the multi-output amplifier (400). For certain aspects, the multi-output amplifier includes a second capacitive attenuator coupled to the input node of the multi-output amplifier, and the second amplification stage has an input coupled to a tap node of the second capacitive attenuator.
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Patent Agency Ranking
公开(公告)号：WO2023048981A1
公开(公告)日：2023-03-30
申请号：PCT/US2022/043228
申请日：2022-09-12
Applicant: QUALCOMM INCORPORATED
Inventor： ABBAS MOHAMED HELMY, Ahmed , GATTA, Francesco , RAMACHANDRAN, Balasubramanian , KULKARNI, Abhishek Ananthrao , THOPPAY EGAMBARAM, Prakash , LAKDAWALA, Hasnain , TASIC, Aleksandar Miodrag , LEE, Jang Joon , HOLLAND, Kyle David
Abstract: Certain aspects of the present disclosure generally relate to techniques and apparatus for operating a wireless receiver of the apparatus in a high linearity mode. An example method includes operating the apparatus in a first mode with transmission of a plurality of transmit signals. The method also includes attenuating a received signal via an attenuator while operating the apparatus in the first mode. The method further includes amplifying the attenuated signal with an amplifier while operating the apparatus in the first mode. For certain aspects, the method further involves operating the apparatus in a second mode, bypassing the attenuator while operating the apparatus in the second mode, and amplifying the received signal with the amplifier while operating the apparatus in the second mode.
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公开(公告)号：EP4406130A1
公开(公告)日：2024-07-31
申请号：EP22783624.4
申请日：2022-09-12
Applicant: QUALCOMM INCORPORATED
Inventor： LAKDAWALA, Hasnain , ABBAS MOHAMED HELMY, Ahmed , GATTA, Francesco , RAMACHANDRAN, Balasubramanian , HUMNABADKAR, Ketan , FENAROLI, Andrea
CPC classification number: H04B1/28 , H04W52/0245 , H04W52/0238 , H04W52/0216 , H04W52/0258 , H04L5/0092
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6.发明公开
公开(公告)号：EP4173136A1
公开(公告)日：2023-05-03
申请号：EP21729762.1
申请日：2021-05-13
Applicant: QUALCOMM INCORPORATED
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公开(公告)号：WO2023048982A1
公开(公告)日：2023-03-30
申请号：PCT/US2022/043235
申请日：2022-09-12
Applicant: QUALCOMM INCORPORATED
Inventor： LAKDAWALA, Hasnain , ABBAS MOHAMED HELMY, Ahmed , GATTA, Francesco , RAMACHANDRAN, Balasubramanian , HUMNABADKAR, Ketan , FENAROLI, Andrea
Abstract: Techniques and apparatus are described for reducing power consumption when performing wireless communications by dynamically changing the frequency of a local oscillator signal for a radio frequency (RF) downconversion circuit, based on signal conditions. An example method includes receiving an RF signal and downconverting the RF signal using an oscillating signal with a first frequency at a first time. The method also includes switching to downconverting the RF signal using the oscillating signal with a second frequency, based on a property associated with the RF signal at a second time. The second frequency is a subharmonic of the first frequency.
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公开(公告)号：WO2022005905A1
公开(公告)日：2022-01-06
申请号：PCT/US2021/039181
申请日：2021-06-25
Applicant: QUALCOMM INCORPORATED
Inventor： MOSLEHI BAJESTAN, Masoud , ZANUSO, Marco , HOSSAIN, Razak , LAKDAWALA, Hasnain
IPC: H03L7/091 , H03L7/087 , H03L7/16 , H03L7/081 , H03L7/089 , H03L7/093 , H03L7/099 , H03L7/0816 , H03L7/0992 , H03L7/0995 , H03L7/0997 , H03L7/1803
Abstract: An apparatus implements a multiplying delay-locked loop (MDLL) including a sampler to be calibrated. In an example aspect, an apparatus includes an MDLL and a sampler calibrator. The MDLL includes a locked-loop feedforward path with a sampler, a control output, a feedback input, and a reference input coupled to a reference signal source. The MDLL also includes a VCO, a multiplexer, and a divider. The VCO includes a VCO input, a VCO output, and a control input coupled to the control output. The multiplexer includes a first input coupled to the reference signal source, a second input coupled to the VCO output, and an output coupled to the VCO input. The divider is coupled between the VCO output and the feedback input. The sampler calibrator includes a first input coupled to the reference signal source, a second input coupled to the VCO output, and an output coupled to the sampler.
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