公开(公告)号：WO2007149475A2

公开(公告)日：2007-12-27

申请号：PCT/US2007/014359

申请日：2007-06-19

Applicant: QUALCOMM INCORPORATED ,  KHONSARI, Nassim ,  CHUI, Clarence

Inventor： KHONSARI, Nassim ,  CHUI, Clarence

IPC: B81B7/00

CPC classification number: B81C1/00269 ,  B81B2201/047 ,  B81C2203/0109 ,  B81C2203/019 ,  B81C2203/032

Abstract: A microelectromechanical systems device (730) having a transparent substrate (710) joined to a planar backplate (720) with a raised perimeter structure (740a) forming a recessed cavity or cell (780). The raised perimeter structure (740a) is formed by applying a first layer (740a) around the peripheral area of the backplate (720) to form a recessed cell (780). A second layer (740b) is applied over the first layer. The first layer (740a) is thicker than the second layer (740b). The thicker layer (740a) comprises a viscous material. A second layer (740b) is a thinner adhesive layer, and is applied over the thicker layer (740a) to join the backplate (720) to the transparent substrate (710) to encapsulate the microelectromechanical systems device (730) formed on the transparent substrate (710).

Abstract translation: 具有连接到平面背板（720）的透明衬底（710）的微机电系统装置（730）具有形成凹腔或电池（780）的凸起周边结构（740a）。 凸起的周边结构（740a）通过围绕背板（720）的周边区域施加第一层（740a）以形成凹陷单元（780）而形成。 在第一层上施加第二层（740b）。 第一层（740a）比第二层（740b）厚。 较厚的层（740a）包括粘性材料。 第二层（740b）是更薄的粘合剂层，并且被施加在较厚层（740a）上以将背板（720）连接到透明基板（710）以封装形成在透明基板上的微机电系统装置（730） （710）。

公开(公告)号：EP2671245A1

公开(公告)日：2013-12-11

申请号：EP12706148.9

申请日：2012-02-06

Applicant: Qualcomm Incorporated

Inventor： LAN, Je-Hsiung ,  NOWAK, Matthew, Michael ,  GOUSEV, Evgeni, P. ,  KIM, Jonghae ,  CHUI, Clarence

IPC: H01L21/02 ,  H01L29/94 ,  H01G4/012 ,  H01L23/522 ,  H01L23/64

CPC classification number: H01L28/82 ,  H01G4/012 ,  H01G4/10 ,  H01L23/5223 ,  H01L23/642 ,  H01L28/87 ,  H01L29/945 ,  H01L2224/16225 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311

Abstract: Higher capacitance density is achieved by increasing a surface area of a capacitor. A larger surface area may be obtained by forming isotropic ball shapes (a concave surface) in the trenches on the semiconductor die. The concave surfaces are fabricated by depositing bilayers of amorphous-silicon and silicon oxide. Openings are patterned in the silicon oxide hard mask for trenches. The openings are transferred to the amorphous-silicon layers through isotropic etching to form concave surfaces. Conducting, insulating, and conducting layers are deposited on the concave surfaces of the trenches by atomic layer deposition.

公开(公告)号：WO2007081547A3

公开(公告)日：2007-07-19

申请号：PCT/US2006/049148

申请日：2006-12-22

Applicant: QUALCOMM INCORPORATED ,  KOTHARI, Manish ,  KOGUT, Lior ,  CHUI, Clarence

Inventor： KOTHARI, Manish ,  KOGUT, Lior ,  CHUI, Clarence

IPC: G01L5/00

Abstract: The invention comprises systems and methods determining residual stress such as that found in interferometric modulators. In one example, a test unit can be configured to indicate residual stress in a film by interferometrically modulating light indicative of an average residual stress in two orthogonal directions of the substrate. The test unit can include a reflective membrane attached to the substrate where membrane is configured as a parallelogram with at least a portion of each side attached to the substrate, and an interferometric cavity formed between a portion of the membrane and a portion of the substrate, and where the membrane is configured to deform based on the residual stress of in the film and modulate light indicative of the amount of membrane deformation.

公开(公告)号：WO2012106720A1

公开(公告)日：2012-08-09

申请号：PCT/US2012/023999

申请日：2012-02-06

Applicant: QUALCOMM INCORPORATED ,  LAN, Je-Hsiung ,  NOWAK, Matthew, Michael ,  GOUSEV, Evgeni, P. ,  KIM, Jonghae ,  CHUI, Clarence

Inventor： LAN, Je-Hsiung ,  NOWAK, Matthew, Michael ,  GOUSEV, Evgeni, P. ,  KIM, Jonghae ,  CHUI, Clarence

IPC: H01L21/02 ,  H01L29/94 ,  H01G4/012 ,  H01L23/522 ,  H01L23/64

CPC classification number: H01L28/82 ,  H01G4/012 ,  H01G4/10 ,  H01L23/5223 ,  H01L23/642 ,  H01L28/87 ,  H01L29/945 ,  H01L2224/16225 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311

Abstract: Higher capacitance density is achieved by increasing a surface area of a capacitor. A larger surface area may be obtained by forming isotropic ball shapes (a concave surface) in the trenches on the semiconductor die. The concave surfaces are fabricated by depositing bilayers of amorphous-silicon and silicon oxide. Openings are patterned in the silicon oxide hard mask for trenches. The openings are transferred to the amorphous-silicon layers through isotropic etching to form concave surfaces. Conducting, insulating, and conducting layers are deposited on the concave surfaces of the trenches by atomic layer deposition.

Abstract translation: 通过增加电容器的表面积来实现更高的电容密度。 可以通过在半导体管芯上的沟槽中形成各向同性球形（凹面）来获得更大的表面积。 通过沉积非晶硅和氧化硅的双层来制造凹面。 在用于沟槽的氧化硅硬掩模中图案化开口。 通过各向同性蚀刻将开口转移到非晶硅层以形成凹面。 导电，绝缘和导电层通过原子层沉积沉积在沟槽的凹面上。

公开(公告)号：EP1878000A2

公开(公告)日：2008-01-16

申请号：EP06752213.6

申请日：2006-05-02

Applicant: Qualcomm Incorporated

Inventor： STEWART, Richard, A. ,  CHUI, Clarence ,  HASTINGS, Robert, S.

IPC: G09G3/34

CPC classification number: G09G3/3466 ,  G09G3/346 ,  G09G2310/0205 ,  G09G2310/0251 ,  G09G2310/0254 ,  G09G2320/0204 ,  G09G2320/043

Abstract: Methods of writing display data to MEMS display elements (12a, 12b) are configured to minimize charge buildup and differential aging. Simultaneous to writing rows of image (56, 60) data, a pre-write operation (58, 62) is performed on a next row. The pre-write operation writes either image data or the inverse of the image data to the next row. In some embodiments, the selection between writing image data and writing inverse image data is performed in a random or pseudo-random manner.

公开(公告)号：WO2007139651A3

公开(公告)日：2007-12-06

申请号：PCT/US2007/010507

申请日：2007-04-30

Applicant: QUALCOMM INCORPORATED ,  SAMPSELL, Jeffrey, Brian ,  CHUI, Clarence ,  GALLY, Brian, J.

Inventor： SAMPSELL, Jeffrey, Brian ,  CHUI, Clarence ,  GALLY, Brian, J.

IPC: G02B26/00 ,  G02F1/1335 ,  H04M1/02

Abstract: Two-sided, back-to-back displays (100) are formed by sealing the backplates (130, 230) of two displays (110, 210) against one another. Mechanical parameters of the backplates (130, 230), e.g., stiffness and strength, do not meet the requirements for standalone one-sided displays which are otherwise similar to the two displays (110, 210). However, when sealed against one another, the backplates (130, 230) reinforce each other to meet or exceed the requirements for both one-sided and two-sided displays. The presence of backplates (130, 230) on each of the constituent one-sided displays (110, 210) allows one or both of those displays (110, 210) to be individually tested, thereby increasing the production yield of the back-to-back displays (100). The display elements (150) of the displays (110, 210) can comprise interferometric modulators.

公开(公告)号：EP2033179A2

公开(公告)日：2009-03-11

申请号：EP07794970.9

申请日：2007-05-16

Applicant: Qualcomm Incorporated

Inventor： CHUI, Clarence ,  LEWIS, Alan ,  MIGNARD, Marc, M.

IPC: G09G3/34

CPC classification number: G09G3/3466 ,  G02B26/001 ,  G09G2310/0218 ,  G09G2310/0267 ,  G09G2310/06 ,  G09G2330/021

Abstract: A display array which can reduce the row connections between the display and the driver circuit and methods of manufacturing and operating the same are disclosed. In one embodiment, a display device comprises an array of MEMS display elements and a plurality of voltage dividers coupled to the array and configured to provide row output voltages to drive the array, wherein each row is connected to at least two inputs joined by a voltage divider.

公开(公告)号：EP2029473A2

公开(公告)日：2009-03-04

申请号：EP07809701.1

申请日：2007-06-19

Applicant: Qualcomm Incorporated

Inventor： KHONSARI, Nassim ,  CHUI, Clarence

IPC: B81B7/00

CPC classification number: B81C1/00269 ,  B81B2201/047 ,  B81C2203/0109 ,  B81C2203/019 ,  B81C2203/032

Abstract: A microelectromechanical systems device (730) having a transparent substrate (710) joined to a planar backplate (720) with a raised perimeter structure (740a) forming a recessed cavity or cell (780). The raised perimeter structure (740a) is formed by applying a first layer (740a) around the peripheral area of the backplate (720) to form a recessed cell (780). A second layer (740b) is applied over the first layer. The first layer (740a) is thicker than the second layer (740b). The thicker layer (740a) comprises a viscous material. A second layer (740b) is a thinner adhesive layer, and is applied over the thicker layer (740a) to join the backplate (720) to the transparent substrate (710) to encapsulate the microelectromechanical systems device (730) formed on the transparent substrate (710).

公开(公告)号：EP1910216A1

公开(公告)日：2008-04-16

申请号：EP06787902.3

申请日：2006-07-19

Applicant: QUALCOMM Incorporated

Inventor： SASAGAWA, Teruo ,  CHUI, Clarence ,  KOTHARI, Manish ,  GANTI, Surya, Prakash ,  SAMPSELL, Jeffrey, B.

IPC: B81B3/00

CPC classification number: G02B26/0841 ,  B81B2201/042 ,  B81B2203/0307 ,  B81C1/00595 ,  B81C2201/0136 ,  G02B6/3584 ,  G02B26/001

Abstract: A microelectromechanical systems device having support structures formed of sacrificial material that is selectively diffused with a dopant material or formed of a selectively oxidized metal sacrificial material. The microelectromechanical systems device includes a substrate having an electrode formed thereon. Another electrode is separated from the first electrode by a cavity and forms a movable layer, which is supported by support structures formed of a diffused or oxidized sacrificial material.