公开(公告)号：WO1997027631A1

公开(公告)日：1997-07-31

申请号：PCT/US1997000863

申请日：1997-01-21

Applicant: RADIANT TECHNOLOGIES, INC.

Inventor： RADIANT TECHNOLOGIES, INC. ,  EVANS, Joseph, T., Jr. ,  WOMACK, Richard

IPC: H01L29/68

CPC classification number: H01L27/11502 ,  G11C11/22 ,  G11C11/5657

Abstract: A high density non volatile ferroelectric-based memory (500) based on ferroelectric FET operated in a two terminal write mode. Storage words may be constructed either from one or two bit storage cells based on a ferroelectric FET (10). A memory using either the one or two bit storage cells includes a plurality of word storage cells (502) organized into a rectangular array including a plurality of columns and rows. Each of the single bit memory cells (101) includes a pass transistor (115) and a ferroelectric storage element (116). All of the gates of the ferroelectric storage elements transistors are connected to a common gate electrode (122), and all of the source electrodes are connected to a common source electrode (121). If the memory is built as a two bit storage cell (300), all of the common source electrodes in each of the columns are connected electrically to a column electrode (504) corresponding to that column and all of the pass gates in each of the rows that are connected electrically to a row electrode (503) corresponding to that row.

Abstract translation: 基于以两端写入模式操作的铁电FET的高密度非挥发性铁电存储器（500）。 存储字可以由基于铁电FET（10）的一个或两个位存储单元构成。 使用一个或两个位存储单元的存储器包括组织成包括多个列和行的矩形阵列的多个字存储单元（502）。 单个位存储单元（101）中的每一个包括通过晶体管（115）和铁电存储元件（116）。 铁电存储元件晶体管的所有栅极连接到公共栅电极（122），并且所有源电极连接到公共源电极（121）。 如果存储器被构建为两位存储单元（300），则每个列中的所有公共源电极电连接到对应于该列的列电极（504），并且在每个列中的所有通孔 与行对应的行电极（503）电连接的行。

公开(公告)号：WO1998033184A1

公开(公告)日：1998-07-30

申请号：PCT/US1997024282

申请日：1997-12-31

Applicant: RADIANT TECHNOLOGIES, INC.

Inventor： RADIANT TECHNOLOGIES, INC. ,  WOMACK, Richard

IPC: G11C11/22

CPC classification number: G11C11/22

Abstract: A memory (500) for storing a plurality of words of data. Each of the words includes N data bits, where N is an integer greater than 1. The memory (500) includes a plurality of storage cells, each of the word storage cells having N + 1 single bit memory cells (512, 513, 514, 517). The single bit memory cells (512, 513, 514, 517) are numbered from 1 to N + 1. Each of the single bit memory cells (512, 513, 514, 517) connects a conductor in a word bus common to all of the memory cells in that word to a bit line that is connected in common to all of the single bit memory cells (512, 513, 514, 517) having the same number. The word bus also includes a conductor for transmitting a signal indicating that this connection is to be made. Each of the single bit memory cells (512, 513, 514) having a number between 1 and N stores one of the N data bits. The memory (500) also includes N sense amplifiers (550, 560, 570), one of the sense amplifiers (550, 560, 570) being connected to each of the bit lines to which the bits numbered 1 to N are connected. Each of the sense amplifiers (550, 560, 570) compares a signal on the bit line (551-553) connected thereto to a signal on the bit line (557) connected to the single bit memory cells (517) numbered (N + 1). When data is written into the data bits of the word, a predetermined value is preferably written into the single bit memory cell (517) number N + 1. Embodiments of the present invention based on ferroelectric FET memory cells (10) or ferroelectric capacitor-based memory cells (100) are preferred.

Abstract translation: 一种用于存储多个数据字的存储器（500）。 每个字包括N个数据位，其中N是大于1的整数。存储器（500）包括多个存储单元，每个字存储单元具有N + 1个单位存储器单元（512,513,514 ，517）。 单位存储器单元（512,513,514,571）从1到N + 1编号。单个位存储单元（512,513,514,571）中的每一个将公用的字总线中的导体连接到 该字中的存储单元与一个与所有具有相同数目的单位存储单元（512,513,514,571）共同连接的位线。 字母线还包括用于发送指示要进行该连接的信号的导体。 具有1和N之间的数字的单个位存储器单元（512,513,514）中的每一个存储N个数据位之一。 存储器（500）还包括N个读出放大器（550,560,570），读出放大器（550,560,570）中的一个连接到连接有编号为1到N的位的每个位线。 每个读出放大器（550,560,570）将连接到其上的位线（551-553）上的信号与连接到编号为（N + 1）的单位存储单元（517）的位线（557）上的信号进行比较， 1）。 当数据被写入字的数据位时，优选地将预定值写入到数字N + 1的单位存储单元（517）中。本发明的实施例基于铁电FET存储单元（10）或铁电电容器 - （100）。