公开(公告)号：WO2017003549A1

公开(公告)日：2017-01-05

申请号：PCT/US2016/029656

申请日：2016-04-28

Applicant: RAYTHEON COMPANY

Inventor： WONG, Tse E. ,  TESHIBA, Kenneth T. ,  CHEN, Shea

IPC: H05K3/30 ,  H05K1/14 ,  H05K3/40 ,  H05K3/34 ,  H01L23/498 ,  H01L23/00

CPC classification number: H05K1/181 ,  B23K35/262 ,  B23K35/268 ,  C22C11/06 ,  C22C13/00 ,  H01L23/15 ,  H01L23/49827 ,  H01L23/49866 ,  H01L24/80 ,  H05K1/111 ,  H05K1/141 ,  H05K3/3436 ,  H05K3/3463 ,  H05K3/4061 ,  H05K2201/10378 ,  H05K2201/2081 ,  Y02P70/613

Abstract: An adaptive interposer 60 is provided to be operably disposable between first and second solder materials 40, 50 of first and second electronic devices 20, 30, respectively. The adaptive interposer includes a plate element formed to define cavities and third solder material 72 disposable in the cavities to be electrically communicative with the first and second solder materials. The third solder material is more compliant and has a higher melting temperature than at least the second solder materials.

Abstract translation: 提供自适应插入器60以分别在第一和第二电子设备20,30的第一和第二焊料材料40,50之间可操作地一次性使用。 自适应插入器包括形成为限定空腔的板元件和在空腔中一次性与第一和第二焊料材料电连通的第三焊料材料72。 第三焊料材料更柔顺并且具有比至少第二焊料材料更高的熔化温度。

公开(公告)号：WO2017087762A1

公开(公告)日：2017-05-26

申请号：PCT/US2016/062700

申请日：2016-11-18

Applicant: RAYTHEON COMPANY

Inventor： WONG, Tse E. ,  CHEN, Shea ,  CHOE, Hoyoung C.

IPC: H05K1/02 ,  H01L23/498 ,  H05K3/34

CPC classification number: H05K1/0271 ,  H01L23/4924 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49866 ,  H01L25/065 ,  H05K1/111 ,  H05K3/3436 ,  H05K3/3457 ,  H05K2201/0305 ,  H05K2201/049 ,  H05K2201/068 ,  H05K2201/09036 ,  H05K2201/094 ,  H05K2201/10378 ,  H05K2201/10734 ,  H05K2203/047 ,  Y02P70/613

Abstract: A stress reduction interposer is provided for disposition between first and second solder materials of first and second electronic devices, respectively. The stress reduction interposer includes a plate element having a central portion and a periphery surrounding the central portion and being formed to define first cavities having an upper area limit at the periphery and a second cavity having a lower area limit, which is higher than the upper area limit, at the central portion and third and fourth solder materials being disposable in the second cavity and in the first cavities, respectively, to be electrically communicative with the first and second solder materials. The third solder material is more compliant and has a higher melting temperature than at least the second and fourth solder materials.

Abstract translation: 为了分别布置在第一和第二电子设备的第一和第二焊料材料之间提供应力减少中介层。 该应力减少中介层包括板元件，该板元件具有中心部分和围绕该中心部分的外围，并且被形成为限定在外围具有上限面积的第一空腔和具有下限面积的第二空腔， 面积限制，并且第三和第四焊料分别在第二腔体和第一腔体中是一次性的，以便与第一和第二焊料材料电连通。 第三焊料材料更柔顺并且具有比至少第二和第四焊料材料更高的熔化温度。

公开(公告)号：EP3318112A1

公开(公告)日：2018-05-09

申请号：EP16721594.6

申请日：2016-04-28

Applicant: Raytheon Company

Inventor： WONG, Tse E. ,  TESHIBA, Kenneth T. ,  CHEN, Shea

IPC: H05K3/30 ,  H05K1/14 ,  H05K3/40 ,  H05K3/34 ,  H01L23/498 ,  H01L23/00

CPC classification number: H05K1/181 ,  B23K35/262 ,  B23K35/268 ,  C22C11/06 ,  C22C13/00 ,  H01L23/15 ,  H01L23/49827 ,  H01L23/49866 ,  H01L24/80 ,  H05K1/111 ,  H05K1/141 ,  H05K3/3436 ,  H05K3/3463 ,  H05K3/4061 ,  H05K2201/10378 ,  H05K2201/2081 ,  Y02P70/613

Abstract: An adaptive interposer is provided to be operably disposable between first and second solder materials of first and second electronic devices, respectively. The adaptive interposer includes a plate element formed to define cavities and third solder material disposable in the cavities to be electrically communicative with the first and second solder materials. The third solder material is more compliant and has a higher melting temperature than at least the second solder materials.

公开(公告)号：EP3378290A1

公开(公告)日：2018-09-26

申请号：EP16806407.9

申请日：2016-11-18

Applicant: Raytheon Company

Inventor： WONG, Tse E. ,  CHEN, Shea ,  CHOE, Hoyoung C.

IPC: H05K1/02 ,  H01L23/498 ,  H05K3/34

CPC classification number: H05K1/0271 ,  H01L23/4924 ,  H01L23/49534 ,  H01L23/49544 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49866 ,  H01L25/065 ,  H05K1/111 ,  H05K3/3436 ,  H05K3/3457 ,  H05K2201/0305 ,  H05K2201/049 ,  H05K2201/068 ,  H05K2201/09036 ,  H05K2201/094 ,  H05K2201/10378 ,  H05K2201/10734 ,  H05K2203/047 ,  Y02P70/613

Abstract: A stress reduction interposer is provided for disposition between first and second solder materials of first and second electronic devices, respectively. The stress reduction interposer includes a plate element having a central portion and a periphery surrounding the central portion and being formed to define first cavities having an upper area limit at the periphery and a second cavity having a lower area limit, which is higher than the upper area limit, at the central portion and third and fourth solder materials being disposable in the second cavity and in the first cavities, respectively, to be electrically communicative with the first and second solder materials. The third solder material is more compliant and has a higher melting temperature than at least the second and fourth solder materials.