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公开(公告)号：AU7339687A
公开(公告)日：1987-12-03
申请号：AU7339687
申请日：1987-05-26
Applicant: RCA CORP
Inventor： BALABAN ALVIN REUBEN , PATEL CHANDRAKANT BHAILALBHAI , DEMMER WALTER HEINRICH , HARWOOD LEOPOLD ALBERT
IPC: H03L7/06 , H03L7/08 , H03L7/087 , H04L5/06 , H04N9/45 , H04N9/455 , H04N9/89 , H04N9/66 , H04N5/04 , H03L7/10
Abstract: A phase locked loop is provided, which may be used in digital systems having clock signal frequency instabilities. The PLL has an analog oscillator (342) the frequency of which is determined by an analog control signal. The oscillatory signal is digitised (344) and phase-compared (338) with a digital reference signal, the digital output of the phase comparator being converted (340) to an analog signal to provide the oscillator control signal. In an application of the invention to a digital television receiver having a line-locked clock, the phase locked loop (350) regenerates two quadrature phase related subcarrier signals (COS,SIN) that are used to synchronously demodulate the chrominance signal components (CB) of the composite video signals into two color information signals (I,Q). The analog voltage-controlled oscillator (342) of the phase locked loop (350) generates a signal that is independent of any frequency instability in the line-locked clock signal. The analog-to-digital converter (344) digitizes this signal to provide one of the subcarrier signals, from which is generated the quadrature subcarrier signal, for example from a read-only memory (348). The two color information signals (I,Q) are obtained by multiplying (332,334) the chrominance signals by the first and second subcarrier signals. The phase comparator (336) determines the phase of the vector sum of the two color information signals and compares this against a desired phase value to generate a phase difference signal. The phase difference signal is filtered (338) and applied to the digital-to-analog converter (340) whichprovides the frequency control signal for the analog oscillator (342). A tracking filter (346) may be inserted at the output port of the analog-to-digital converter (344) to allow its quantization resolution to be reduced without affecting the performance of the phase locked loop.
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公开(公告)号：GB2110044A
公开(公告)日：1983-06-08
申请号：GB8230832
申请日：1982-10-28
Applicant: RCA CORP
Inventor： LEWIS HENRY GARTON , PATEL CHANDRAKANT BHAILALBHAI
Abstract: The network is for use in a television signal receiver including a source of digital video signals 10 and produces two outputs having two different amplitude versus frequency response characteristics. A comb filter 14 produces a signal having frequency bands of luminance information signals and chrominance information signals. The chrominance signal is then subjected to filtering 22 to remove vertical detail information, the output of the subtractor 26, therefore, supplies the vertical detail information which is combined with the luminance signal Y, in the adder 30. Details of the filter 22 are given in relation to Fig. 2.
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公开(公告)号：FR2516332A1
公开(公告)日：1983-05-13
申请号：FR8218613
申请日：1982-11-05
Applicant: RCA CORP
Inventor： LEWIS HENRY GARTON JR , PATEL CHANDRAKANT BHAILALBHAI
Abstract: The network is for use in a television signal receiver including a source of digital video signals 10 and produces two outputs having two different amplitude versus frequency response characteristics. A comb filter 14 produces a signal having frequency bands of luminance information signals and chrominance information signals. The chrominance signal is then subjected to filtering 22 to remove vertical detail information, the output of the subtractor 26, therefore, supplies the vertical detail information which is combined with the luminance signal Y, in the adder 30. Details of the filter 22 are given in relation to Fig. 2.
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公开(公告)号：AU8989482A
公开(公告)日：1983-05-12
申请号：AU8989482
申请日：1982-10-29
Applicant: RCA CORP
Inventor： LEWIS HENRY GARTON , PATEL CHANDRAKANT BHAILALBHAI
Abstract: The network is for use in a television signal receiver including a source of digital video signals 10 and produces two outputs having two different amplitude versus frequency response characteristics. A comb filter 14 produces a signal having frequency bands of luminance information signals and chrominance information signals. The chrominance signal is then subjected to filtering 22 to remove vertical detail information, the output of the subtractor 26, therefore, supplies the vertical detail information which is combined with the luminance signal Y, in the adder 30. Details of the filter 22 are given in relation to Fig. 2.
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公开(公告)号：GB2183422B
公开(公告)日：1989-12-28
申请号：GB8627555
申请日：1986-11-18
Applicant: RCA CORP , RCA LICENSING CORP
Inventor： PATEL CHANDRAKANT BHAILALBHAI
Abstract: A vertical detail enhancer for use in a progressive scan video signal processor is disclosed. An interstitial luminance signal producer produces interstitial luminance signals in response to interlaced luminance signals from a source of such signals. Means modify the interlaced and interstitial luminance signals for enhancing the vertical detail of the displayed image by adding only overshoot to leading edges and only undershoot to trailing edges. Further means sequence the vertical detail enhanced interlaced and interstitial luminance signals to produce a signal representing a progressively scanned image.
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Patent Agency Ranking
公开(公告)号：AU7216487A
公开(公告)日：1987-11-05
申请号：AU7216487
申请日：1987-04-28
Applicant: RCA CORP
Inventor： BALABAN ALVIN REUBEN , HARWOOD LEOPOLD ALBERT , PATEL CHANDRAKANT BHAILALBHAI , DEMMER WALTER HEINRICH
Abstract: In the described embodiment of the invention, a digital television receiver, having a line locked clock (CK), includes a first digital phase locked loop (232-252) which regenerates quadrature phase related subcarrier signals that are used to synchronously demodulate (232, 234) the chrominance signal components of composite video signals into color information signals. When nonstandard video signals (e.g., from a video tape recorder) are processed by the receiver, frequency instabilities in the line locked clock signal may cause the colour information signals to be distorted. To compensate for this distortion, a second phase locked loop (300) is synchronized to a reference signal generated by an analog oscillator (310). The analog reference signal is linearly added (314) to baseband analog video signals. The combined signals are digitized by an analog-to-digital converter (211) and then filtered by parallel low-pass and band-pass filters (301, 304) to develop digital signals representing the video signals and the reference signal, respectively. The digital reference signal is used to synchoronize the second phase locked loop (300), the control signals of which (from 320) are used to compensate (328) the first phase locked loop (232-252) for frequency instabilities in the clock signal. More generally, the invention envisages the use of a single analog-to-digital converter for digitizing combined analog signals (e.g. video and auxiliary signals) which occupy different frequency bands, the digitized signals being separated by filtering before being supplied to respective utilization or processing circuits.
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公开(公告)号：FI871806A
公开(公告)日：1987-11-03
申请号：FI871806
申请日：1987-04-24
Applicant: RCA CORP
Inventor： BALABAN ALVIN REUBEN , HARWOOD LEOPOLD ALBERT , PATEL CHANDRAKANT BHAILALBHAI , DEMMER WALTER HEINRICH
Abstract: In the described embodiment of the invention, a digital television receiver, having a line locked clock (CK), includes a first digital phase locked loop (232-252) which regenerates quadrature phase related subcarrier signals that are used to synchronously demodulate (232, 234) the chrominance signal components of composite video signals into color information signals. When nonstandard video signals (e.g., from a video tape recorder) are processed by the receiver, frequency instabilities in the line locked clock signal may cause the colour information signals to be distorted. To compensate for this distortion, a second phase locked loop (300) is synchronized to a reference signal generated by an analog oscillator (310). The analog reference signal is linearly added (314) to baseband analog video signals. The combined signals are digitized by an analog-to-digital converter (211) and then filtered by parallel low-pass and band-pass filters (301, 304) to develop digital signals representing the video signals and the reference signal, respectively. The digital reference signal is used to synchoronize the second phase locked loop (300), the control signals of which (from 320) are used to compensate (328) the first phase locked loop (232-252) for frequency instabilities in the clock signal. More generally, the invention envisages the use of a single analog-to-digital converter for digitizing combined analog signals (e.g. video and auxiliary signals) which occupy different frequency bands, the digitized signals being separated by filtering before being supplied to respective utilization or processing circuits.
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公开(公告)号：AU7051487A
公开(公告)日：1987-10-01
申请号：AU7051487
申请日：1987-03-23
Applicant: RCA CORP
Inventor： DEMMER WALTER HEINRICH , HARWOOD LEOPOLD ALBERT , PATEL CHANDRAKANT BHAILALBHAI , BALABAN ALVIN REUBEN
IPC: H03L7/06 , H03L7/08 , H03L7/087 , H03L7/099 , H03L7/22 , H04N9/45 , H04N11/04 , H04N11/08 , H04N5/04
Abstract: As used in a digital television receiver, the invention is associated with a first phase locked loop which develops a sampling clock signal that is locked to the horizontal line synchronizing signal components of a composite video signal. A second digital phase locked loop is clocked by the sampling clock signal and develops a digital signal that is phase locked to the color burst signal. This digital signal is used as a regenerated color subcarrier signal to synchronously demodulate the chrominance components of the composite video signals into I and Q color difference signals. To compensate for frequency instability in the regenerated subcarrier signal caused by frequency instabilities in the line-locked clock signal, a third digital phase locked loop (300) develops an output signal which is phase locked to a reference signal generated by a crystal controlled oscillator (310). Control signals (C') from the third phase locked loop are applied (328) to the second phase locked loop to substantially compensate for frequency instabilities in the regenerated subcarrier signal that are induced by the clock signals.
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公开(公告)号：FR2590756A1
公开(公告)日：1987-05-29
申请号：FR8616269
申请日：1986-11-21
Applicant: RCA CORP
Inventor： PATEL CHANDRAKANT BHAILALBHAI
Abstract: A vertical detail enhancer for use in a progressive scan video signal processor is disclosed. An interstitial luminance signal producer produces interstitial luminance signals in response to interlaced luminance signals from a source of such signals. Means modify the interlaced and interstitial luminance signals for enhancing the vertical detail of the displayed image by adding only overshoot to leading edges and only undershoot to trailing edges. Further means sequence the vertical detail enhanced interlaced and interstitial luminance signals to produce a signal representing a progressively scanned image.
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公开(公告)号：FI872259A0
公开(公告)日：1987-05-22
申请号：FI872259
申请日：1987-05-22
Applicant: RCA CORP
Inventor： BALABAN ALVIN REUBEN , PATEL CHANDRAKANT BHAILALBHAI , DEMMER WALTER HEINRICH , HARWOOD LEOPOLD ALBERT
Abstract: A phase locked loop is provided, which may be used in digital systems having clock signal frequency instabilities. The PLL has an analog oscillator (342) the frequency of which is determined by an analog control signal. The oscillatory signal is digitised (344) and phase-compared (338) with a digital reference signal, the digital output of the phase comparator being converted (340) to an analog signal to provide the oscillator control signal. In an application of the invention to a digital television receiver having a line-locked clock, the phase locked loop (350) regenerates two quadrature phase related subcarrier signals (COS,SIN) that are used to synchronously demodulate the chrominance signal components (CB) of the composite video signals into two color information signals (I,Q). The analog voltage-controlled oscillator (342) of the phase locked loop (350) generates a signal that is independent of any frequency instability in the line-locked clock signal. The analog-to-digital converter (344) digitizes this signal to provide one of the subcarrier signals, from which is generated the quadrature subcarrier signal, for example from a read-only memory (348). The two color information signals (I,Q) are obtained by multiplying (332,334) the chrominance signals by the first and second subcarrier signals. The phase comparator (336) determines the phase of the vector sum of the two color information signals and compares this against a desired phase value to generate a phase difference signal. The phase difference signal is filtered (338) and applied to the digital-to-analog converter (340) whichprovides the frequency control signal for the analog oscillator (342). A tracking filter (346) may be inserted at the output port of the analog-to-digital converter (344) to allow its quantization resolution to be reduced without affecting the performance of the phase locked loop.
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