公开(公告)号：US20040113699A1

公开(公告)日：2004-06-17

申请号：US10688976

申请日：2003-10-21

Applicant: Renesas Technology Corp.

Inventor： Masao Kondo ,  Toru Masuda ,  Katsuyoshi Washio

IPC: H03F003/68

CPC classification number: H03F3/211 ,  H03F1/302 ,  H03F2200/372 ,  H03F2203/21178

Abstract: There is provided not only a radio frequency power amplifier using an SiGe HBT subject to a little amplification distortion, but also a communication system using the same. A conventional radio frequency power amplifier provides base bias paths of transistors Q1 through QN (SiGe HBT) with bias resistors R11 through R1N having resistance values three to five times higher than those of a ballast resistor attached to each transistor's base. A coil LB is provided in parallel with the bias resistor as a means for compensating a voltage drop due to direct current component IDC flowing through the bias resistor. Addition of the bias resistor suppresses non-linearity of low-frequency variations in an output current. Addition of the coil compensates for voltage drop. Accordingly, the maximum linear output power can be improved. As a result, it is possible to provide the power amplifier subject to a little amplification distortion within a wide output range.

Abstract translation: 不仅提供使用SiGe HBT的射频功率放大器，而且具有很小的放大失真，而且还提供了使用它的通信系统。 传统的射频功率放大器提供具有偏置电阻器R11至R1N的晶体管Q1至QN（SiGe HBT）的基极偏置路径，该偏置电阻器的电阻值为连接到每个晶体管基极的镇流电阻器的电阻值的三到五倍。 线圈LB与偏置电阻并联提供，作为用于补偿由直流成分IDC流过偏置电阻器的电压降的装置。 增加偏置电阻抑制输出电流中低频变化的非线性。 线圈的添加补偿电压降。 因此，可以提高最大线性输出功率。 结果，可以在宽的输出范围内提供具有小的放大失真的功率放大器。

公开(公告)号：US20040108559A1

公开(公告)日：2004-06-10

申请号：US10673789

申请日：2003-09-30

Applicant: Renesas Technology Corp.

Inventor： Nobuyuki Sugii ,  Kazuhiro Ohnishi ,  Katsuyoshi Washio

IPC: H01L029/76

CPC classification number: H01L29/785 ,  H01L29/1054 ,  H01L29/66795 ,  H01L29/7842 ,  H01L29/78648 ,  H01L29/78687 ,  H01L29/802

Abstract: With the invention, it is possible to avoid deterioration in short-channel characteristics, caused by a silicon germanium layer coming into contact with the channel of a strained SOI transistor. Further, it is possible to fabricate a double-gate type of strained SOI transistor or to implement mixedly mounting the strained SOI transistor and a conventional silicon or SOI transistor on the same wafer. According to the invention, for example, a strained silicon layer is grown on a strain-relaxed silicon germanium layer, and subsequently, portions of the silicon germanium layer are removed, thereby constituting a channel layer in the strained silicon layer.

Abstract translation: 利用本发明，可以避免由与应变SOI晶体管的沟道接触的硅锗层引起的短沟道特性的劣化。 此外，可以制造双栅型应变SOI晶体管，或者在同一晶片上实现将应变SOI晶体管和常规硅或SOI晶体管混合安装。 根据本发明，例如，在应变松弛硅锗层上生长应变硅层，随后去除硅锗层的部分，从而在应变硅层中构成沟道层。