公开(公告)号：US20040198019A1

公开(公告)日：2004-10-07

申请号：US10814627

申请日：2004-04-01

Applicant: Renesas Technology Corp.

Inventor： Kan Yasui ,  Toshiyuki Mine ,  Yasushi Goto ,  Natsuki Yokoyama

IPC: H01L021/76

CPC classification number: H01L21/76224 ,  Y10S438/907

Abstract: In order to achieve an isolation trench formation process according to the present invention in which the structure of a silicon nitride film liner can be easily controlled and to allow both of reduction of the device feature length and reduction in stress occurring in an isolation trench, the silicon nitride film liner is first deposited on the inner wall of the trench formed on a silicon substrate. The upper surface of a first embedded insulator film for filling the inside of the trench is recessed downward so as to expose an upper end portion of the silicon nitride film liner. Next, the exposed portion of the silicon nitride film liner is converted into non-silicon-nitride type insulator film, such as a silicon oxide film. A second embedded insulator film is then deposited on the upper portion of the first embedded insulator film, and the deposited surface is then planarized.

Abstract translation: 为了实现根据本发明的隔离沟槽形成方法，其中可以容易地控制氮化硅膜衬垫的结构并且允许器件特征长度的减小和在隔离沟槽中发生的应力的减小， 氮化硅膜衬垫首先沉积在形成在硅衬底上的沟槽的内壁上。 用于填充沟槽内部的第一嵌入式绝缘体膜的上表面向下凹入以暴露氮化硅膜衬垫的上端部分。 接下来，将氮化硅膜衬垫的露出部分转换成诸如氧化硅膜的非氮化硅型绝缘膜。 然后将第二嵌入式绝缘膜沉积在第一嵌入式绝缘膜的上部上，然后将沉积的表面平坦化。