1.
    发明专利
    未知

    公开(公告)号:IT8922891D0

    公开(公告)日:1989-12-29

    申请号:IT2289189

    申请日:1989-12-29

    Abstract: Process for the manufacture of power-MOS semiconductor devices which achieve high cell density by the use of self-aligning techniques and photographic exposure equipment of the stepper type. The process calls for definition and formation of the source by a complementary spacer technique and metallization of the source and gate contact areas by silicides after formation of spacers on the gate wall (FIG. 11).

    2.
    发明专利
    未知

    公开(公告)号:IT8921281D0

    公开(公告)日:1989-07-24

    申请号:IT2128189

    申请日:1989-07-24

    Abstract: Along the outline of a first doped region of a first mask is formed using the spacer technology, said mask being made up of a dielectric opposing to the oxygen diffusion. Another mask is created within this first mask, using a process of selective thermal oxidation. The second mask is used to implant dopant into a second region which will only be defined along the outlines of the first region.

    3.
    发明专利
    未知

    公开(公告)号:DE69007449T2

    公开(公告)日:1994-08-25

    申请号:DE69007449

    申请日:1990-12-24

    Abstract: Process for the manufacture of power-MOS semiconductor devices which achieve high cell density by the use of self-aligning techniques and photographic exposure equipment of the stepper type. The process calls for definition and formation of the source by a complementary spacer technique and metallization of the source and gate contact areas by silicides after formation of spacers on the gate wall (FIG. 11).

    4.
    发明专利
    未知

    公开(公告)号:DE69007449D1

    公开(公告)日:1994-04-21

    申请号:DE69007449

    申请日:1990-12-24

    Abstract: Process for the manufacture of power-MOS semiconductor devices which achieve high cell density by the use of self-aligning techniques and photographic exposure equipment of the stepper type. The process calls for definition and formation of the source by a complementary spacer technique and metallization of the source and gate contact areas by silicides after formation of spacers on the gate wall (FIG. 11).

    5.
    发明专利
    未知

    公开(公告)号:IT1231300B

    公开(公告)日:1991-11-28

    申请号:IT2128189

    申请日:1989-07-24

    Abstract: Along the outline of a first doped region of a first mask is formed using the spacer technology, said mask being made up of a dielectric opposing to the oxygen diffusion. Another mask is created within this first mask, using a process of selective thermal oxidation. The second mask is used to implant dopant into a second region which will only be defined along the outlines of the first region.

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