公开(公告)号：JPH05183112A

公开(公告)日：1993-07-23

申请号：JP36051091

申请日：1991-12-27

Applicant: SONY CORP

Inventor： HASHIMOTO HIDEYA

IPC: H01L21/822 ,  H01L27/04

Abstract: PURPOSE:To effectively avoid the possibility of propagation of noise generated in a source region and its vicinity to an analog circuit part through wiring via substrate terminal region and substrate by giving supply voltage to the substrate from dedicated second wiring via the substrate terminal region. CONSTITUTION:The title device has an analog circuit part 2 for processing analog signals and a digital circuit part 3 for processing digital signals on the same substrate 4. The digital circuit part 3 is equipped with a first wiring 51a for supplying the source regions 33, 43 of MOS transistors 60, 40 with supply voltage from an outer terminal and with a second wiring 51b for supplying substrate terminal regions 34, 44 with the supply voltage from the outer terminal. Therefore, the potential of the substrate 4 is kept constant by the supply voltage given from the dedicated second wiring 51b via the substrate terminal regions 34, 44. Thus, it is possible to effectively avoid the possibility of propagation of noise generated in the source region 33 out of the first wiring 51a and its vicinity to the analog circuit part 2 through the substrate terminal region 34.

公开(公告)号：JPH01246915A

公开(公告)日：1989-10-02

申请号：JP7530288

申请日：1988-03-29

Applicant: SONY CORP

Inventor： HOTTA HIDEAKI ,  YANAGIMOTO KAORU ,  SHOJI NORIO ,  NARISAWA KEIJI ,  WATANABE SHINICHI ,  HASHIMOTO HIDEYA

IPC: G11B5/09 ,  H03K5/01 ,  H03K5/1252

Abstract: PURPOSE:To obtain a time domain filter which prevents occurrence of erroneous data by providing a delay circuit on the line coupling of the output terminal of a comparator and a D-type FF. CONSTITUTION:Variation of the output B of a comparator 1 is detected by means of a pulse generating circuit 2 and the output D of a monostable multivi brator 4 is inverted by the short pulses C outputted from the circuit 2. The output D of the vibrator 4 is returned to the original state after a prescribed time. In case the output B of the comparator 1 is inverted by a noise when the output D is returned to the original state, the inverted output B is inputted to a D-type FF 5 as an output B' after it is delayed by a prescribed time by means of a delay circuit 3. As a result, the FF 5 holds the output D before inversion of the comparator 1. Moreover, if the output B of the comparator 1 is inverted immediately before the output 4 of the vibrator 4 returns to the original state, the vibrator 4 is triggered. Therefore, the FF 5 does not hold the inverted output of the comparator 1. The output E of the FF 5 is led to a pulse generating circuit 6 and a monostable multivibrator 7 is triggered. As a result, pulse signals are outputted as read data F.

公开(公告)号：JP2508535B2

公开(公告)日：1996-06-19

申请号：JP15048687

申请日：1987-06-17

Applicant: SONY CORP

Inventor： HASHIMOTO HIDEYA ,  SHOJI NORIO

IPC: G05F3/22 ,  G05F3/26 ,  H03F3/04 ,  H03F3/343

公开(公告)号：JPH02249979A

公开(公告)日：1990-10-05

申请号：JP7216689

申请日：1989-03-24

Applicant: SONY CORP

Inventor： SHOJI NORIO ,  HASHIMOTO HIDEYA

IPC: G01R19/22 ,  H02M7/12 ,  H02M7/21

Abstract: PURPOSE:To execute the operation at a high speed by controlling a current switch in accordance with a comparison output of a comparator and supplying selectively a first and a second current sources to a first and a second differential amplifying parts, and obtaining both wave rectifying outputs of a first and a second input signals from a connecting point of a second and a fourth transistors, and a second current source. CONSTITUTION:By controlling a current switch 9 in accordance with a comparison output of a comparator 10, and supplying selectively a prescribed current of a first and a second current sources 8, 11 to a first and a second amplifying parts 6, 7, both wave rectifying outputs of a first and a second input signals can be obtained from a connecting point of a second and a fourth transistors Q2, Q4 and the current source 11, and also, the operation can be executed at a high speed. Also, for instance, when levels of a first and a second input signals are equal, an equal current is supplied to a first and a second differential amplifying part 6, 7 from the current source 8, an output voltage of a connecting point of the transistors Q2, Q4 connected to a diode and the current source 11 becomes equal to a level of a first input signal, and when the input signal is zero, the output voltage also becomes zero, therefore, no error voltage is generated.

公开(公告)号：JPS63314627A

公开(公告)日：1988-12-22

申请号：JP15048687

申请日：1987-06-17

Applicant: SONY CORP

Inventor： HASHIMOTO HIDEYA ,  SHOJI NORIO

IPC: G05F3/22 ,  G05F3/26 ,  H03F3/04 ,  H03F3/343

Abstract: PURPOSE:To ensure a high-speed switching action and at the same time to decrease the number of elements of a current source circuit, by switching the base-emitter junction of a 4th transistor between the reverse or forward bias via the control voltage, thereby switching the inactive and active states to execute a fast switching operation. CONSTITUTION:A current source circuit is active and inactive when the base- emitter junction of a 4th transistor TR7 is biased reverse and forward respectively by the control voltage. The voltage applied to the base-emitter junction of the TR7 in a forward bias mode is kept under VBE (inter-base-emitter forward voltage). Thus the TR 7 is not saturated and switched at high speed. In addition, the value of a current source 12 has no relation with the value of the control voltage which is used to turn off the TR 7. Thus it is not required to connect a base resistance to both TRs 7 and 17 when plural current source circuits are controlled by a single control voltage generating circuit. Then the number of elements can be decreased for a current source circuit.