公开(公告)号：DE3545434C2

公开(公告)日：1995-07-20

申请号：DE3545434

申请日：1985-12-20

Applicant: SONY CORP

Inventor： KATO YOJI ,  WATANABE SEIICHI ,  KAMATA MIKIO

IPC: H01L29/812 ,  H01L21/338 ,  H01L29/43 ,  H01L29/778 ,  H01L21/8252 ,  H01L29/49

Abstract: A high electron mobility transistor in which a threshold-voltage Vth is substantially zero comprises a GaAs substrate (1), a GaAs layer (2) of a low impurity concentration formed on the substrate (1), an AlGaAs layer (13) of a low impurity concentration formed on the GaAs layer (2), a gate electrode (5) of silicon or a compound of silicon and a metal formed on the AlGaAs layer (13), and a source electrode and a drain electrode (8, 9) formed on the AlGaAs layer (13). Other semiconductor materials e.g. AlGaIn or AlInP may be used for the layer (13).

公开(公告)号：GB2168847B

公开(公告)日：1988-05-25

申请号：GB8531441

申请日：1985-12-20

Applicant: SONY CORP

Inventor： KATO YOJI ,  WATANABE SEIICHI ,  KAMATA MIKIO

IPC: H01L29/812 ,  H01L21/338 ,  H01L29/43 ,  H01L29/778 ,  H01L29/46 ,  H01L29/76

Abstract: A high electron mobility transistor in which a threshold-voltage Vth is substantially zero comprises a GaAs substrate (1), a GaAs layer (2) of a low impurity concentration formed on the substrate (1), an AlGaAs layer (13) of a low impurity concentration formed on the GaAs layer (2), a gate electrode (5) of silicon or a compound of silicon and a metal formed on the AlGaAs layer (13), and a source electrode and a drain electrode (8, 9) formed on the AlGaAs layer (13). Other semiconductor materials e.g. AlGaIn or AlInP may be used for the layer (13).

公开(公告)号：FR2582152A1

公开(公告)日：1986-11-21

申请号：FR8518969

申请日：1985-12-20

Applicant: SONY CORP

Inventor： KATO YOJI ,  WATANABE SEIICHI ,  KAMATA MIKIO

IPC: H01L29/812 ,  H01L21/338 ,  H01L29/43 ,  H01L29/778 ,  H01L29/76

Abstract: A high electron mobility transistor in which a threshold-voltage Vth is substantially zero comprises a GaAs substrate (1), a GaAs layer (2) of a low impurity concentration formed on the substrate (1), an AlGaAs layer (13) of a low impurity concentration formed on the GaAs layer (2), a gate electrode (5) of silicon or a compound of silicon and a metal formed on the AlGaAs layer (13), and a source electrode and a drain electrode (8, 9) formed on the AlGaAs layer (13). Other semiconductor materials e.g. AlGaIn or AlInP may be used for the layer (13).

公开(公告)号：GB2168848A

公开(公告)日：1986-06-25

申请号：GB8531442

申请日：1985-12-20

Applicant: SONY CORP

Inventor： TOGASHI KOU ,  KATO YOJI

IPC: H01L29/205 ,  H01L21/331 ,  H01L29/10 ,  H01L29/73 ,  H01L29/735 ,  H01L29/737 ,  H01L29/739 ,  H01L29/70 ,  H01L29/225

Abstract: A semiconductor device according to the invention comprises: a first semiconductor layer having a low impurity concentration formed on a semiconductor substrate; a second semiconductor layer of a first conductivity type formed on the first semiconductor layer and forming a heterojunction therewith; an emitter region and a collector region formed in the first and second semiconductor layers; and a semiconductor region of a second conductivity type formed in at least the second semiconductor layer between the emitter region and the collector region, wherein two-dimensional electron gas layers, induced in portions of the first semiconductor layer adjacent to the heterojunction and between the emitter region and the semiconductor region and between the collector region and the semiconductor region, are used as current paths, and a virtual base region is formed in the first semiconductor layer below the semiconductor region by majority carriers injected from the semiconductor region into the first semiconductor layer by forward biasing the emitter region and the semiconductor region, thereby enabling a bipolar transistor operation with two dimensional electron gas layers.

公开(公告)号：GB2168194A

公开(公告)日：1986-06-11

申请号：GB8529057

申请日：1985-11-26

Applicant: SONY CORP

Inventor： WADA MASARU ,  KATO YOJI

IPC: H01L21/22 ,  H01L21/033 ,  H01L21/223 ,  H01L21/302

Abstract: A method for selectively diffusing impurities such as zinc into the substrate of a compound semiconductor such as gallium arsenide (GaAs). The method makes use of a diffusion mask in such a manner that the thickness of the oxygen-containing layer at the interface between the diffusion mask and the semiconductor substrate is less than 20 ANGSTROM so that the abnormal transverse diffusion that would otherwise occur at the interface in the vicinity of the opening of the diffusion mask on the semiconductor surface is suppressed. The result is an increased accuracy in the diffusion pattern of the impurities.

公开(公告)号：CA1253632A

公开(公告)日：1989-05-02

申请号：CA500585

申请日：1986-01-29

Applicant: SONY CORP

Inventor： TAKAKUWA HIDEMI ,  KATO YOJI

IPC: H01L29/812 ,  H01L21/338 ,  H01L29/778 ,  H01L29/76

Abstract: A heterojunction field effect transistor according to the invention, comprises: first, second and third semiconductor layers which are sequentially stacked on each other; a first heterojunction formed between said first and second semiconductor layer; a second heterojunction formed between the second and third semiconductor layers; first and second two-dimensional electron gas layers formed in portions of the second semiconductor layer adjacent respectively to the first and second heterojunctions; and a gate electrode, a source electrode and a drain electrode formed on either of the first and third semiconductor layers, wherein the first two-dimensional electron gas layer extends from a portion corresponding to the gate electrode to the drain electrode and has one end virtually connected to the drain electrode, the second two-dimensional electron gas layer extends from a portion corresponding to the gate electrode to the source electrode and has one end virtually connected to the source electrode, and the number of electrons migrating between the first and second twodimensional electron gas layers is modulated, in the portion of the second semiconductor layer corresponding to the gate electrode, by a voltage to be applied to the gate electrode, thereby controlling a current flowing between the source electrode and the drain electrode. With this structure, an effective gate length is defined by the thickness of the second semiconductor layer. Therefore, when the thickness of the second semiconductor layer is precisely controlled, a gate length can easily be shortened, and a current density can be increased when compared with a conventional device.

公开(公告)号：CA1238122A

公开(公告)日：1988-06-14

申请号：CA497744

申请日：1985-12-16

Applicant: SONY CORP

Inventor： KATO YOJI ,  WATANABE SEIICHI ,  KAMATA MIKIO

IPC: H01L29/812 ,  H01L21/338 ,  H01L29/43 ,  H01L29/778 ,  H01L29/12

Abstract: A semiconductor device according to the invention comprises: a GaAs substrate; a GaAs layer of a low impurity concentration formed on the GaAs substrate; an AlGaAs layer of a low impurity concentration formed on the GaAs layer; a gate electrode of silicon or a compound of silicon and a metal formed on the AlGaAs layer; and a source electrode and a drain electrode formed on the AlGaAs layer. With this structure, a high electron mobility transistor in which a threshold voltage Vth is substantially 0 can be obtained.

公开(公告)号：GB2168194B

公开(公告)日：1988-06-08

申请号：GB8529057

申请日：1985-11-26

Applicant: SONY CORP

Inventor： WADA MASARU ,  KATO YOJI

IPC: H01L21/22 ,  H01L21/033 ,  H01L21/223 ,  H01L21/302

Abstract: A method for selectively diffusing impurities such as zinc into the substrate of a compound semiconductor such as gallium arsenide (GaAs). The method makes use of a diffusion mask in such a manner that the thickness of the oxygen-containing layer at the interface between the diffusion mask and the semiconductor substrate is less than 20 ANGSTROM so that the abnormal transverse diffusion that would otherwise occur at the interface in the vicinity of the opening of the diffusion mask on the semiconductor surface is suppressed. The result is an increased accuracy in the diffusion pattern of the impurities.

公开(公告)号：CA1237538A

公开(公告)日：1988-05-31

申请号：CA498553

申请日：1985-12-24

Applicant: SONY CORP

Inventor： TOGASHI KOU ,  KATO YOJI

IPC: H01L29/205 ,  H01L21/331 ,  H01L29/10 ,  H01L29/73 ,  H01L29/735 ,  H01L29/737 ,  H01L29/739 ,  H01L29/02

Abstract: A semiconductor device according to the invention comprises: a first semiconductor layer having a low impurity concentration formed on a semiconductor substrate; a second semiconductor layer of a first conductivity type formed on the first semiconductor layer and forming a heterojunction therewith; an emitter region and a collector region formed in the first and second semiconductor layers; and a semiconductor region of a second conductivity type formed in at least the second semiconductor layer between the emitter region and the collector region, wherein two-dimensional electron gas layers, induced in portions of the first semiconductor layer adjacent to the heterojunction and between the emitter region and the semiconductor region and between the collector region and the semiconductor region, are used as current paths, and a virtual base region is formed in the first semiconductor layer below the semiconductor region by majority carriers injected from the semiconductor region into the first semiconductor layer by forward biasing the emitter region and the semiconductor region, thereby enabling a bipolar transistor operation.

公开(公告)号：GB2168848B

公开(公告)日：1988-04-20

申请号：GB8531442

申请日：1985-12-20

Applicant: SONY CORP

Inventor： TOGASHI KOU ,  KATO YOJI

IPC: H01L29/205 ,  H01L21/331 ,  H01L29/10 ,  H01L29/73 ,  H01L29/735 ,  H01L29/737 ,  H01L29/739 ,  H01L29/70 ,  H01L29/225

Abstract: A semiconductor device according to the invention comprises: a first semiconductor layer having a low impurity concentration formed on a semiconductor substrate; a second semiconductor layer of a first conductivity type formed on the first semiconductor layer and forming a heterojunction therewith; an emitter region and a collector region formed in the first and second semiconductor layers; and a semiconductor region of a second conductivity type formed in at least the second semiconductor layer between the emitter region and the collector region, wherein two-dimensional electron gas layers, induced in portions of the first semiconductor layer adjacent to the heterojunction and between the emitter region and the semiconductor region and between the collector region and the semiconductor region, are used as current paths, and a virtual base region is formed in the first semiconductor layer below the semiconductor region by majority carriers injected from the semiconductor region into the first semiconductor layer by forward biasing the emitter region and the semiconductor region, thereby enabling a bipolar transistor operation with two dimensional electron gas layers.