公开(公告)号：DE60140076D1

公开(公告)日：2009-11-12

申请号：DE60140076

申请日：2001-12-20

Applicant: SONY CORP

Inventor： YAMAGATA HIDEO ,  KOUMOTO TAKEYOSHI ,  ATSUUMI KENJI ,  NEGORO YOICHI ,  HIRATA TATSUSHIRO ,  NOGUCHI TAKASHI

IPC: H01L21/205 ,  C23C16/22 ,  C30B25/02 ,  H01L21/20 ,  H01L21/331 ,  H01L29/73 ,  H01L29/737

Abstract: In a vapor-phase growth method in which a silicon-germanium mixed crystal layer is deposited on a semiconductor substrate, the vapor-phase growth method comprises a first step of introducing silicon raw material gas into a reaction furnace in such a manner that a silicon raw material gas partial pressure increases in proportion to a time to thereby deposit a first semiconductor layer of a silicon layer on the semiconductor substrate under reduced pressure, a second step of introducing silicon raw material gas and germanium raw material gas into the reaction furnace in such a manner that a desired germanium concentration may be obtained to thereby deposit a second semiconductor layer of a silicon-germanium mixed crystal layer on the first semiconductor layer under reduced pressure and a third step of introducing silicon raw material gas into the reaction furnace under reduced pressure to thereby deposit a third semiconductor layer of a silicon layer on the second semiconductor layer. Thus, there can be obtained a semiconductor layer in which a misfit dislocation can be improved.

公开(公告)号：EP1403929A4

公开(公告)日：2008-06-04

申请号：EP02730914

申请日：2002-06-04

Applicant: SONY CORP

Inventor： KOUMOTO TAKEYOSHI ,  YAMAGATA HIDEO

IPC: H01L21/331 ,  H01L29/737

CPC classification number: H01L29/66242 ,  H01L29/7378 ,  Y10S438/933 ,  Y10S438/938

Abstract: A semiconductor layer and a forming method therefor to be applicable to, e.g., a heterojunction bipolar transistor, and a semiconductor device and a production method therefor. The semiconductor layer and the forming method therefor involve a first SiGe film or SiGeC film containing Ge having a concentration that provides a thermal expansion coefficient equal to that of silicon oxide and a second SiGe or SiGeC film formed thereon. The semiconductor device and the production method therefor, wherein a first layer and a second layer are laminated on an opening-carrying oxide film, the first layer being almost equal in thermal expansion coefficient to the oxide film and different in thermal expansion coefficient than the second layer. Consequently, stress caused by the difference in thermal expansion coefficient is not likely to occur in a laminate film and a misfit dislocation is restricted to thereby provide a suitable application to a heterojunction bipolar transistor.

公开(公告)号：EP1345260A4

公开(公告)日：2008-05-28

申请号：EP01994979

申请日：2001-12-20

Applicant: SONY CORP

Inventor： YAMAGATA HIDEO ,  KOUMOTO TAKEYOSHI ,  ATSUUMI KENJI ,  NEGORO YOICHI ,  HIRATA TATSUSHIRO ,  NOGUCHI TAKASHI

IPC: H01L21/205 ,  C23C16/22 ,  C30B25/02 ,  H01L21/20 ,  H01L21/331 ,  H01L29/73 ,  H01L29/737

CPC classification number: H01L21/02505 ,  C30B25/02 ,  C30B29/52 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/0251 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02636 ,  H01L29/66242

Abstract: In a vapor-phase growth method in which a silicon-germanium mixed crystal layer is deposited on a semiconductor substrate, the vapor-phase growth method comprises a first step of introducing silicon raw material gas into a reaction furnace in such a manner that a silicon raw material gas partial pressure increases in proportion to a time to thereby deposit a first semiconductor layer of a silicon layer on the semiconductor substrate under reduced pressure, a second step of introducing silicon raw material gas and germanium raw material gas into the reaction furnace in such a manner that a desired germanium concentration may be obtained to thereby deposit a second semiconductor layer of a silicon-germanium mixed crystal layer on the first semiconductor layer under reduced pressure and a third step of introducing silicon raw material gas into the reaction furnace under reduced pressure to thereby deposit a third semiconductor layer of a silicon layer on the second semiconductor layer. Thus, there can be obtained a semiconductor layer in which a misfit dislocation can be improved.