公开(公告)号：JPH11111872A

公开(公告)日：1999-04-23

申请号：JP21785498

申请日：1998-07-31

Applicant: ST MICROELECTRON INC

Inventor： CHAN TSUI CHIU ,  SAGARWALA PERVEZ H ,  NGUYEN LOI

IPC: H01L21/8247 ,  H01L21/336 ,  H01L27/115 ,  H01L29/423 ,  H01L29/788 ,  H01L29/792

Abstract: PROBLEM TO BE SOLVED: To improve the insulation by providing an oxide layer having an increased thickness between the outer end of a polysilicon silicide layer and substrate disposed blow it. SOLUTION: A thin porous oxide is deposited at a comparatively low temp. to surround a polysilicon silicide layer 228, and this layer is anisotropically etched to form a pattern i.e., the lower corners 278 of a polysilicon layer 234 are rounded, compared with in prior art, to locate slightly apart from the top surface of an underlying n-type region 210 and the rounded corners are slightly laterally displaced from the boundary 276 of a side wall oxide spacer 230. These structures at the ends of a tunnel oxide layer 226 greatly improve the dielectric completeness at the lower corners of the polysilicon layer 228 by an oxidizing process for converting some of Si in the polysilicon layer 234 and a small amt. of the top surface of a substrate 206 into Si dioxide.