公开(公告)号：DE69521579T2

公开(公告)日：2002-05-29

申请号：DE69521579

申请日：1995-09-15

Applicant: ST MICROELECTRONICS INC

Inventor： CUNNINGHAM JAMES A

IPC: H01L21/265 ,  H01L21/336 ,  H01L29/423 ,  H01L29/786 ,  H01L21/28

Abstract: A semiconductor device includes an insulating support. A strip of semiconductor material has two ends in contact with the insulating support and a midsection extending between the ends. A dielectric layer encircles the midsection, and a conductive layer encircles the dielectric layer. The conductive layer has a substantially constant width such that a gate electrode formed within the conductive layer is fully self-aligned with drain and source regions formed within the ends.

公开(公告)号：DE69524178D1

公开(公告)日：2002-01-10

申请号：DE69524178

申请日：1995-09-15

Applicant: ST MICROELECTRONICS INC

Inventor： CUNNINGHAM JAMES A

IPC: H01L21/265 ,  H01L21/336 ,  H01L21/8244 ,  H01L27/11 ,  H01L29/423 ,  H01L29/786 ,  H01L29/10

Abstract: A transistor is formed on a substrate of dielectric material. The transistor includes a layer of semiconductor material that is formed on the substrate and has a source region and a drain region. The layer also has a channel region that is in a recess of the substrate and adjacent to the source and drain regions. The channel is self-aligned, as are the light doped source and drain regions.

公开(公告)号：DE69734383D1

公开(公告)日：2006-03-02

申请号：DE69734383

申请日：1997-12-12

Applicant: ST MICROELECTRONICS INC

Inventor： BRYANT FRANK R ,  SINGH ABHA R ,  CUNNINGHAM JAMES A

IPC: H01L21/316 ,  H01L21/66 ,  H01L21/70 ,  H01L21/82 ,  H01L23/31 ,  H01L23/50

Abstract: A passivation structure is formed using two passivation layers and a protective overcoat layer using two masking steps. The first passivation layer is formed over the wafer and openings are provided to expose portions of the pads for testing the device and fusible links. After testing and laser repair, a second passivation layer is formed over the wafer followed a deposit of the protective overcoat. The protective overcoat is patterned and etched, exposing the pads. The remaining portions of the protective overcoat are used as a mask to remove portions of the second passivation layer overlying the pads. Leads are then attached to pads and the devices are encapsulated for packaging. The second passivation layer overlaps edge portions of the first passivation layer at the bond pads to enhance moisture resistance.

公开(公告)号：DE69524178T2

公开(公告)日：2002-05-16

申请号：DE69524178

申请日：1995-09-15

Applicant: ST MICROELECTRONICS INC

Inventor： CUNNINGHAM JAMES A

IPC: H01L21/265 ,  H01L21/336 ,  H01L21/8244 ,  H01L27/11 ,  H01L29/423 ,  H01L29/786 ,  H01L29/10

Abstract: A transistor is formed on a substrate of dielectric material. The transistor includes a layer of semiconductor material that is formed on the substrate and has a source region and a drain region. The layer also has a channel region that is in a recess of the substrate and adjacent to the source and drain regions. The channel is self-aligned, as are the light doped source and drain regions.

公开(公告)号：DE69521579D1

公开(公告)日：2001-08-09

申请号：DE69521579

申请日：1995-09-15

Applicant: ST MICROELECTRONICS INC

Inventor： CUNNINGHAM JAMES A

IPC: H01L21/265 ,  H01L21/336 ,  H01L29/423 ,  H01L29/786 ,  H01L21/28

Abstract: A semiconductor device includes an insulating support. A strip of semiconductor material has two ends in contact with the insulating support and a midsection extending between the ends. A dielectric layer encircles the midsection, and a conductive layer encircles the dielectric layer. The conductive layer has a substantially constant width such that a gate electrode formed within the conductive layer is fully self-aligned with drain and source regions formed within the ends.