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    2.
    发明专利
    未知

    公开(公告)号：FR2817657A1

    公开(公告)日：2002-06-07

    申请号：FR0015789

    申请日：2000-12-06

    Applicant: ST MICROELECTRONICS SA

    Inventor： CASTILLEJO ARMAND

    IPC: H01L23/10 ,  H01L23/58 ,  H01L23/60 ,  H01L23/66

    Abstract: The invention concerns a substrate SB incorporating several electronic components C1, C2, and a seal ring SR enclosing the electronic components. It comprises means forming a cold spot VM, PG, BDG arranged between the electronic components and the seal ring. It further includes protection means against electrostatic discharges comprising an electrostatic discharge strip VM enclosing the electronic components and forming said cold spot means.

    3.
    发明专利
    未知

    公开(公告)号：FR2817657B1

    公开(公告)日：2003-09-26

    申请号：FR0015789

    申请日：2000-12-06

    Applicant: ST MICROELECTRONICS SA

    Inventor： CASTILLEJO ARMAND

    IPC: H01L23/10 ,  H01L23/58 ,  H01L23/60 ,  H01L23/66

    Abstract: The integrated circuit includes a substrate SB incorporating a plurality of electronic components C 1 , C 2 and a seal ring SR around the electronic components. It includes cold spot means VM, PG, BDG disposed between the electronic components and the seal ring. It further includes electrostatic discharge protection means including an electrostatic discharge rail VM around the electronic components and constituting said cold spot means.

    Integrated circuit protection against electrostatic discharge, comprising resistor in series with transistor connected between output plot and supply line, in addition to diodes
    4.
    发明专利
    Integrated circuit protection against electrostatic discharge, comprising resistor in series with transistor connected between output plot and supply line, in addition to diodes 未知

    公开(公告)号：FR2813439A1

    公开(公告)日：2002-03-01

    申请号：FR0011075

    申请日：2000-08-30

    Applicant: ST MICROELECTRONICS SA

    Inventor： CASTILLEJO ARMAND ,  PINATEL CHRISTOPHE ,  BOSSU FREDERIC ,  GARNIER CHRISTOPHE

    IPC: H01L27/02 ,  H01L23/60

    Abstract: The integrated circuit (2'') comprises an output block (4) coupled to an output plot (6) by a capacitor (C), the first unidirectional conduction element (8) for connecting the plot to a supply line (10) when the voltage on the plot exceeds the supply line voltage (VDD) by the first threshold voltage (VT1), the second unidirectional conduction element (12) for connecting the plot to threshold voltage (VT2), a resistor (24) connected between the output plot and the supply line by the intermediary of a switch (26) in the form of a MOS transistor, which is open when the circuit is inactive and closed when the circuit is in normal functioning mode. The resistance (24) has a low value in the case of d.c. impedance (R1) of a load (16) connectable to the output plot, and a high value in the case of a.c. impedance of the load. The unidirectional conduction element (8,12) is composed of a group of diodes connected in series, in particular two diodes. The output block (4) comprises a bipolar transistor (18) whose collector is connected to the capacitor (C), the emitter to the ground, and an inductor (20) connected between the collector and the supply line.

    5.
    发明专利
    未知

    公开(公告)号：DE60139841D1

    公开(公告)日：2009-10-22

    申请号：DE60139841

    申请日：2001-07-23

    Applicant: ST MICROELECTRONICS SA

    Inventor： CASTILLEJO ARMAND ,  RERAT FABIENNE

    IPC: H01F17/00 ,  H01F21/12 ,  H01L23/522 ,  H01L23/64 ,  H01L23/66

    Abstract: An integrated circuit including a structure of inductances on a semiconductor substrate, intended for operating at frequencies greater than several hundreds of MHz, including a first inductance formed by a conductive track and having first and second terminals respectively connected to each of the two ends of the conductive track, including a second inductance formed by the conductive track between the second terminal and any intermediary point of the conductive track connected to a third terminal, said second and third terminals forming the two terminals of the second inductance, and means for setting the third terminal to high impedance when the first inductance is used.

    6.
    发明专利
    未知

    公开(公告)号：FR2813439B1

    公开(公告)日：2003-01-31

    申请号：FR0011075

    申请日：2000-08-30

    Applicant: ST MICROELECTRONICS SA

    Inventor： CASTILLEJO ARMAND ,  PINATEL CHRISTOPHE ,  BOSSU FREDERIC ,  GARNIER CHRISTOPHE

    IPC: H01L27/02 ,  H01L23/60

    Abstract: An integrated circuit including an output pad, an output block coupled to the output pad via a capacitor, a first one-way conduction element for connecting the pad to a supply line when the voltage on the pad exceeds the voltage of the supply line by a first threshold voltage, a second one-way conduction element for connecting the pad to the circuit ground when the voltage on the pad is smaller than the ground voltage by a second threshold voltage, a resistor coupled on the one hand to the output pad and on the other hand to the supply line via a switch which is turned off when the circuit is idle and which is turned on when the circuit is in a normal operating mode.

    7.
    发明专利
    未知

    公开(公告)号：FR2812445B1

    公开(公告)日：2002-11-29

    申请号：FR0010066

    申请日：2000-07-31

    Applicant: ST MICROELECTRONICS SA

    Inventor： CASTILLEJO ARMAND ,  RERAT FABIENNE

    IPC: H01F17/00 ,  H01F21/12 ,  H01L23/522 ,  H01L23/66 ,  H05K1/16 ,  H01L27/00

    Abstract: An integrated circuit including a structure of inductances on a semiconductor substrate, intended for operating at frequencies greater than several hundreds of MHz, including a first inductance formed by a conductive track and having first and second terminals respectively connected to each of the two ends of the conductive track, including a second inductance formed by the conductive track between the second terminal and any intermediary point of the conductive track connected to a third terminal, said second and third terminals forming the two terminals of the second inductance, and means for setting the third terminal to high impedance when the first inductance is used.

    8.
    发明专利
    未知

    公开(公告)号：FR2812445A1

    公开(公告)日：2002-02-01

    申请号：FR0010066

    申请日：2000-07-31

    Applicant: ST MICROELECTRONICS SA

    Inventor： CASTILLEJO ARMAND ,  RERAT FABIENNE

    IPC: H01F17/00 ,  H01F21/12 ,  H01L23/522 ,  H01L23/66 ,  H05K1/16 ,  H01L27/00

    Abstract: An integrated circuit including a structure of inductances on a semiconductor substrate, intended for operating at frequencies greater than several hundreds of MHz, including a first inductance formed by a conductive track and having first and second terminals respectively connected to each of the two ends of the conductive track, including a second inductance formed by the conductive track between the second terminal and any intermediary point of the conductive track connected to a third terminal, said second and third terminals forming the two terminals of the second inductance, and means for setting the third terminal to high impedance when the first inductance is used.

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