公开(公告)号：DE602005003258T2

公开(公告)日：2008-09-18

申请号：DE602005003258

申请日：2005-04-22

Applicant: ST MICROELECTRONICS SA

Inventor： LLARDET PIERRE-YVAN ,  TEGLIA YANNICK

IPC: G06F21/72 ,  G06F21/75 ,  G06F21/77

Abstract: The process involves starting an execution of a calculation, and starting another execution of the same calculation once the former execution has freed a block and its process in a second. The executions are synchronized such that the latter execution uses a hardware block only when the former execution passes to the next block. The identity between the two results is verified at the end of execution of both the calculations. An independent claim is also included for a chip card.

公开(公告)号：DE602005003258D1

公开(公告)日：2007-12-27

申请号：DE602005003258

申请日：2005-04-22

Applicant: ST MICROELECTRONICS SA

Inventor： LLARDET PIERRE-YVAN ,  TEGLIA YANNICK

IPC: G06F21/72 ,  G06F21/75 ,  G06F21/77

Abstract: The process involves starting an execution of a calculation, and starting another execution of the same calculation once the former execution has freed a block and its process in a second. The executions are synchronized such that the latter execution uses a hardware block only when the former execution passes to the next block. The identity between the two results is verified at the end of execution of both the calculations. An independent claim is also included for a chip card.