公开(公告)号：JPH11251315A

公开(公告)日：1999-09-17

申请号：JP36911598

申请日：1998-12-25

Applicant: ST MICROELECTRONICS SA

Inventor： GAYET PHILIPPE ,  BRUNEL CHANTAL ,  MARTIN STEPHANE

IPC: H01L21/3205 ,  G01R31/28 ,  G03F7/20 ,  H01L23/52 ,  H01L23/528

Abstract: PROBLEM TO BE SOLVED: To judge resistance of a via, by a method wherein, in a position alignment between a path of a metallization layer and the corresponding via, or between the via and the corresponding path, a contact area between the path and the via is corrected with respect to a normal contact area. SOLUTION: First and second path parts 21, 22 are extended to a direction for corresponding vias 24, 25 and come close to all path parts neighboring the via on the same metallization layer from a common side. A continuous part 23 is not placed so that it comes nearer to one of the vias 24, 25 with substantially larger than a width of the via. A contact area is equal irrespective of a direction and an orientation of offsets between a path 20 and the vias 24, 25. All resistances in a part of the predetermined number of vias and paths are calculated, and a value of one via resistance can be obtained, and it is possible to uniformize more the respective via resistances in the entire integrated circuit and to judge an individual via resistance.

公开(公告)号：FR2773264A1

公开(公告)日：1999-07-02

申请号：FR9716654

申请日：1997-12-30

Applicant: ST MICROELECTRONICS SA

Inventor： GAYET PHILIPPE ,  BRUNEL CHANTAL ,  MARTIN STEPHANE

IPC: H01L21/3205 ,  G01R31/28 ,  G03F7/20 ,  H01L23/52 ,  H01L23/528

Abstract: When photolithography causes track offsets, the two metallization layers attachments are changed by the same resistance.

公开(公告)号：FR2773264B1

公开(公告)日：2001-06-08

申请号：FR9716654

申请日：1997-12-30

Applicant: ST MICROELECTRONICS SA

Inventor： GAYET PHILIPPE ,  BRUNEL CHANTAL ,  MARTIN STEPHANE

IPC: H01L21/3205 ,  G01R31/28 ,  G03F7/20 ,  H01L23/52 ,  H01L23/528